Dr. Ajey Jacob is the director of the Application Specific Intelligent Computing (ASIC) Lab, a research group at the Information Sciences Institute (ISI), University of Southern California. Ajey Jacob brings 16 years of industry research, development, and manufacturing experience from Intel Corporation and GLOBAFOUNDRIES (GF) to ISI. Ajey primarily focuses on materials, devices, and integration aspects of the technology. Before joining ISI in October 2019, Ajey Jacob started and managed its differentiating technology research group for the GF worldwide R&D. In this capacity, Ajey Jacob researched More than Moore differentiating and disruptive elements such as silicon photonics, non-volatile memory (MRAM, FeRAM, RRAM), for a plethora of applications such as transceivers, embedded memory, advanced logic, neuromorphic computing at its advanced fab in Malta, NY. Dr. Jacob has also served GF in various other capacities such as leading the exploratory device and integration research group (sub 14 nm technology node), and the pathfinding integration research program (10 & 7 nm node) for the IBM Alliance in Albany, NY. Until 2011, Ajey Jacob worked as a senior research scientist for Intel corporation’s component research organization. At Intel, Ajey managed two industry-sponsored strategic research consortia for next-generation CMOS devices and materials “Western Institute of Nanoelectronics” (WIN) and “Functional Engineering in Nano Architectonics” (FENA) and many other Intel-sponsored research projects. Ajey Jacob has also been a device engineer supporting the high-volume manufacturing of the 90 nm technologies at Intel and 28 nm technology at GLOBALFOUNDRIES. Dr. Ajey has published 3 book chapters, over 100 peer-reviewed journals, conferences papers, industry reports, and over 250 worldwide issued and published patents (+168 issued United States Patents), and more than 50 inventions pending USPTO approval.
Email: ajey@isi.edu, Phone: +1 (424) 502-7747
Dr. Akhilesh Jaiswal is a Research Assistant Professor of Electrical and Computer Engineering at USC’s Viterbi School of Engineering. He also serves as a computer scientist with ASIC Lab at the Information Sciences Institute. His current research interest includes device-circuit co-design using existing and alternate state variables for future electronic systems. Prior to USC/ISI, Dr. Jaiswal served as a Senior Research Engineer for Technology Solutions Group at GLOBALFOUNDRIES. As a Senior Engineer, he worked on developing a compact device model for MRAM-based AI in-memory compute circuits and enabling AI acceleration through hybrid photonic-electronic neuro-mimetic devices. Akhilesh received his Ph.D. degree in Nano-electronics from Purdue University in May 2019 under the supervision of Prof. Kaushik Roy and his Master’s degree from the University of Minnesota in May 2014. As a part of the doctoral program, his research focused on 1) Exploration of bio-mimetic devices and circuits using emerging non-volatile technologies for Neuromorphic computing. 2) CMOS based analog and digital in-memory and near-memory computing using standard memory bit-cells for beyond von-Neumann AI/ML acceleration. Akhilesh was an intern with GLOBALFOUNDRIES Differentiating Technology Lab, Malta, in the summer of 2017 and with ARM Devices-Circuits-System Research Group, Austin, in summer 2018. He has authored over 30 articles in peer-reviewed journals and conferences including Nature, Philosophical Transactions of the Royal Society, Physics Review Applied, Scientific Reports, Journal of Applied Physics, IEEE-TVLSI, IEEE TED, IEEE TCAS, IEEE JETCAS, IEEE Mag. Letters etc. Dr. Jaiswal has 8 issued patents with USPTO and over 15 pending patents.
Email: akjaiswal@isi.edu, akhilesh@usc.edu Phone: +1 (703) 812-3705
Dr. Sujith Chandran received his PhD in 2017 from the Department of Electrical Engineering, Indian Institute of Technology Madras (IITM). He completed MSc (Physics) and M. Tech (Electronics and Communication) degrees from Mahatma Gandhi University and Kerala University, respectively. After completing PhD, Dr. Sujith joined Microsystems Engineering group (Masdar Institute) at Khalifa University as a postdoctoral researcher. At Khalifa University, he was leading a silicon photonics research group for an industrial project in collaboration with GLOBALFOUNDRIES. In this project, his team focused on the design and characterization of passive/active silicon photonics components aimed to expand the process design kit (PDK) for GLOBALFOUNDRIES’ 45 nm technology node.
Dr. Sujith has over 8 years of hands-on experience in sophisticated semiconductor processing tools including electron beam lithography, mask aligner, scanning electron microscope, and dry etching systems. He also has sound knowledge in silicon photonics device simulators such as Lumerical FDTD, MODE Solutions, EME, Interconnects, Phoenix and Rsoft –BeamProp and FEM. He authored/co-authored over 20 peer-reviewed journal and conference publications. He has 6 granted patents to credit and 2 other pending applications. His primary research interests include smart photonics sensors, photonic neural networks, innovative micro/nanofabrication techniques, silicon photonics devices for high-speed communication applications, photonic crystal structures, silicon-silicon nitride wave guiding platforms.
Priyatam Chiliki is a VLSI Engineer at the Information Sciences Institute. His research interests include analog and mixed-signal design for advanced computing applications , design automation in circuits, heterogenous packaging and co-design of the package and IC. In the past at ISI, he worked on projects associated with Cytomorphic Computing, which involve applying the fundamentals of analog design to a cutting-edge bio-inspired computing approach. He is the recipient of the 2019 ISI Research Award based on a proposal he co-authored titled 'Automating Programmability of Hybrid Digital-Analog Hardware for Stochastic Cell Simulation in Biological Systems'. He also worked on developing a codesign framework for package/IC design along with identifying the constituents of an Assembly Design Kit (ADK) for advanced packaging. He also has experience in carrying out extensive research surveys capturing the capabilities of the US semiconductor and packaging ecosystem. Priyatam graduated with a master's degree in Electrical and Computer Engineering from the University of Maryland, College Park, in May 2019.
Clynn Mathew is an electrical engineer with more than four years of experience in the field of design enablement and verification. Clynn has a Master’s degree in Electrical and Computer engineering from Binghamton University. His areas of interest are VLSI design and verification. He is part of the ASIC team in ISI and is currently working on the DARPA DPRIVE project developing hardware for homomorphic encryption.
Dr. Ramesh Kudalippalliyalil is a post-doctoral fellow in the Application Specific Intelligent Computing (ASIC) Lab. Ramesh currently focuses on photonics-based Quantum Chip Photonics Interconnects (QuIC) and Quantum Chip Photonics Interposers (QuIP) for chip-to-chip and on-chip quantum information processing. The primary research includes microwave-to-optical frequency conversion of superconducting qubits and efficient photonic qubit couplers for a quantum optical chip interposer. Besides, Ramesh also develops photonics components and interconnects for wafer computer chips and, in particular, novel optical memory devices. Dr. Ramesh Kudalippalliyalil joins ISI after a two-year post-doctoral stint at the Laboratory for Physical Sciences (LPS), University of Maryland. He received his Ph.D. in Electrical Engineering in 2018 on Integrated optoelectronics (Silicon Photonics) from the Indian Institute of Technology, Madras.
Ramesh has extensive experience in photonic/electronic simulation tools such as Lumerical MODE/DEVICE/FDTD, R-Soft, COMSOL Multiphysics, and Silvaco – TCAD. Ramesh is also an experimentalist with vast experience in the state-of-the-art class 10 and class 100 nanoelectronics cleanrooms. He has fabricated both passive and active photonic devices based on Si, SiN, and AlN materials during his Ph.D. and PD. Besides, during his post-doctoral work at MD state, he has simulated and fabricated integrated photonic devices based on 2D-materials like Black Phosphorous, palladium diselenide, etc. Outside work, he is interested in volunteer work, painting, gaming and traveling.
Agastya Gogoi received his undergraduate degree in Electronics and Communication from SRM Institute of Science and Technology in 2019. He has worked as an intern in IBM and Barola Technologies. He joined the ASIC lab in summer 2021 and is working as a master's student under the guidance of Dr. Akhilesh Jaiswal. His research interests include In-Memory Computing, Near- memory computing and novel techniques to achieve Low Power Designs for different memory technologies. The project he is working on is a DRAM embedded memory system using gated RRAM.
Haripriya Sheshadri received B.E. in Telecommunication Engineering from PES University, Bangalore, India in 2018. She worked as an EMC Design Engineer at Robert Bosch before pursuing her Master's degree in Electrical Engineering at USC. She joined ASIC Lab in Summer 2020 and is working as a Master’s Research intern under the guidance of Dr. Akhilesh Jaiswal. Her research interests include Memory design, specifically SRAM design to accelerate AI computations. She is currently working on Augmented Memory Computing to accelerate Ternary Neural Network computations.
Ziyan Chen received her master’s degree in Electrical Engineering from the University of Southern California in 2020. She joined ASIC Lab in fall 2020 and worked as an intern under the guidance of Professor Akhilesh Jaiswal. Her research area includes In-Memory Computing and Non-volatile SRAM. In her spare time, she loves traveling and has been to many countries. She also enjoys scale modeling and painting.
Shwetha received B. Tech. in Electronics and Communication Engineering from National Institute of Technology, Karnataka, India in 2019. She joined ASIC Lab in Summer 2020 and is currently pursuing her Masters's degree in VLSI Design at USC. Her research interests include Augmented Memory Computing and memory chip design. She is an avid reader and a trained Indian classical dancer.
Amandeep Vaish received his Bachelors in Electronics Engineering from VIT University (India) in 2019 before pursuing Masters in Computer Engineering from USC. He has been a part of ASIC Lab since Fall 2020 working as a Master's Researcher directed by Dr. Akhilesh Jaiswal. His research interests include Emerging Memory Technologies and In-Memory Computation. When not at his desk, he can be found eating donuts and enjoying Kohli's highlights.
Ruchir Mathur received his B.Tech degree from Jamia Millia Islamia in Electronics and Communications Engineering in 2018. He is currently pursuing MS degree in Electrical Engineering at USC with a focus on VLSI Design and Microarchitecture. He interned at Cisco Systems Inc. as a part of Signal Integrity team of the Unified Computing Solutions Group. He joined the ASIC lab in Fall 2020 as a Research Student under the guidance of Dr. Akhilesh Jaiswal. His research interests include Spin Transfer Torque Magnetic RAM and its cryogenic application. He likes to go on long road trips.
Lei Gao received his B.S. degree in electrical engineering from the University of California, Santa Barbara, in 2019. He is currently a second-year Master's student in electrical engineering at the University of Southern California. He worked as an intern at Chipltech, Shenzhen and he applied for a patent during his internship. He joined the ASIC lab in spring 2021 and is working as a research intern under the guidance of Professor Jaiswal. His research interests include algorithm hardware codesign for deep neural network and architecture design for a wafer-scale chip. Lei spends his spare time watching Netflix and practicing Chinese calligraphy.
Arpita Goel received B.Tech. in Electrical and Electronics Engineering from Guru Gobind Singh Indraprastha University. She worked as a summer intern for the Smart City Project at the Indian Institute of Technology, Kanpur. She joined the ASIC Lab in Spring 2021 and is working as a Master's Research student under the guidance of Professor Akhilesh Jaiswal. Her research interests include In-Memory Computing and Emerging Memory Technologies. Outside of curricular activities, she is deeply passionate about indoor gardening and baking.
Rohit Kane received his B.E. in Electronics Engineering from the University of Mumbai in 2019. He worked as a summer intern at Sequretek Pvt. Ltd. in Mumbai. He joined ASIC Lab in Spring 2021 and is working as a Master's Research Student under the guidance of Dr. Akhilesh Jaiswal. His research interests include In-Memory Computing and Neuromorphic Algorithms. In his free time, he likes to write poetry and likes socializing with others.
K. Pragathi received her undergraduate degree in Electronics and Communication from Nitte Meenakshi Institute of Technology in 2019. She worked as a physical design trainee at RV VLSI Design Centre. She joined the ASIC lab in spring 2021 and is working as a Master’s student under the guidance of Dr.Akhilesh Jaiswal. Her research interests include In-Memory Computing and Neuromorphic algorithms. In her free time, she likes to paint and explore new eateries since she happens to be a food fanatic.
Jheel Nagaria received his B. Tech in Electronics Engineering from Veermata Jijabai Technological Institute (VJTI), Mumbai in 2018. Before joining USC as a Masters student in Electrical Engineering, he worked as a Junior Engineer at VJTI and a Research Intern at Tata Institute of Fundamental Research (TIFR). He joined ASIC Lab in Fall 2020 as a research student under Prof. Akhilesh Jaiswal. His research interests include Magnetic RAMs for cryogenic temperatures.
Shubham Gupta received his B. Tech. in Electronics and Communication Engineering from National Institute of Technology, Jaipur, India in 2016. Prior to joining USC he was working as a CPU Implementation Engineer at Samsung Semiconductors RnD. Overall he has an experience of 4.5 years in Physical Design and STA with Samsung and Synopsys. He has been a part of ASIC Lab since Spring 2021 and is currently pursuing his Masters's degree in VLSI Design at USC. His research interest includes Low Power Designs , Novel Techniques for meeting High Frequency in CPU implementation. He follows cricket very closely and loves to explore different cuisines.
Zihan Yin received his Bachelors in Electronic Information Engineering from Shanghai Tech University (Shanghai) in 2021. He is currently pursuing his Ph.D. in Electrical Engineering at USC under the guidance of Prof. Akhilesh Jaiswal. His research interests include in-memory computing circuit design and emerging new memory design.
Humberto Inzunza is currently pursuing a bachelor’s degree in Computer Engineering and Computer Science at the University of Southern California. He joined ASIC Lab in the spring of 2021 under the CURVE program as an undergraduate researcher. His research areas include magnetic random-access memory (MRAM), its stochastic behavior, and applications to neuromorphic synaptic computing. During his free time, he enjoys hiking and trying out new cooking recipes.