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Paper on GCN inference at ASAP ’20

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Our paper “Accelerate large scale GCN inference on FPGA” has been accepted at the The 31st IEEE International Conference on
Application-specific Systems, Architectures and Processors (ASAP ’20). This paper presents an algorithm-architecture co-optimization framework to accelerate large scale graph convolutional neural network (GCN) inference on FPGA.

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