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  1. EE 599: Accelerated Computing using FPGAs is offered during Spring 2020
    Recently, Field Programmable Gate Arrays(FPGAs) have become a key computing platform to accelerate applications at data center, cloud, and at the “edge”. This course reviews the technology and software tools from the application acceleration perspective and discusses (application-specific) architectural, software, and algorithmic innovations to realize the potential of this technology to optimize latency, throughput, and…
  2. GraphACT accepted at FPGA '20
    Our paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platforms" has been accepted as a full paper at the 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '20). This paper describes a novel accelerator design for training GCNs on CPU-FPGA heterogeneous systems by incorporating multiple algorithm architecture co-optimizations.
  3. Flexible dataflow machine for CNN acceleration accepted at FPGA '20
    Our paper "Reuse Kernels or Activations? A Flexible Dataflow for Low-latency Spectral CNN Acceleration" has been accepted as a full paper at the 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '20). It describes a principle designing an approach for low-latency, low-bandwidth, spectral sparse CNN accelerator on FPGAs to overcome the performance gap between…
  4. Angelos Defends his PhD Dissertation
    Ph.D. Candidate Angelos Lazaris successfully defended his Ph.D. Dissertation titled Machine Learning for Efficient Network Management. The defense committee consisted of Professor Viktor K. Prasanna (Chair), Professor Cauligi Raghavendra, and Professor Jyotirmoy V. Deshmukh.
  5. Best Paper Nomination at HPEC '19
    The paper "Design and Implementation of Knowledge Base for Runtime Management of Software Defined Hardware" has been nominated for Best Student Paper Award at the 23rd IEEE High Performance Extreme Computing Conference (HPEC '19). The paper describes a novel design of the central component of a dynamic software compiler for software-defined hardware.
  6. Best Paper Nomination at FPL '19
    Our paper on "A Flexible Design Automation Tool for Accelerating Quantized Spectral CNNs" has been selected as one of the papers for Michal Servit Best Paper Award at the 29th International Conference on Field-Programmable Logic and Applications (FPL '19). This paper focuses on a flexible tool to automate the process of generating high throughput accelerators…
  7. Accurate, Efficient and Scalable Graph Embedding accepted at IPDPS '19
    Our paper "Accurate, Efficient and Scalable Graph Embedding" has been accepted as a full paper at IEEE IPDPS '19. This paper describes a novel sampling-based low-complexity technique for Inductive Learning on Graphs and efficient parallelization of all the steps in the algorithm.
  8. PhD Graduation Party
    The graduation party for Sanmukh Kuppannagari, Ajitesh Srivastava, and Shijie Zhou was held on Saturday, September 29th. The venue was El Torito in Santa Monica.
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