FPGA Accelerated HE-Convolution accepted at FPL ’21

Our paper “Performance Modeling and FPGA Acceleration of Homomorphic Encrypted Convolution” has been accepted as a full paper at the The International Conference on Field-Programmable Logic and Applications 2021 (FPL’21). This paper proposed a unified FPGA design that enables low latency execution of both im2col and frequency domain HE-Convolution.