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Publications

Disclaimer: The following papers may have copyright restrictions. Downloads will have to adhere to these restrictions. They may not be reposted without explicit permission from the copyright holder. Any opinions, findings, and conclusions or recommendations expressed in these materials are those of the author(s) and do not necessarily reflect the views of the sponsors including National Science Foundation (NSF), Defense Advanced Research Projects Agency (DARPA), and any other sponsors listed in the publications. Click here for the complete list of publications of all Labs under Prof. Viktor K. Prasanna.
    1. Lin, Yi-Chien; Xu, Zhijie; Prasanna, Viktor, xBS-GNN: Accelerating Billion-Scale GNN Training on FPGA, Proceedings of the SC ’23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis (SC-W), 2024
    2. Yang, Yang; Kannan, Rajgopal; Prasanna, Viktor K., A Framework for Generating Accelerators for Homomorphic Encryption Operations on FPGAs, 2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2024
    3. Lin, Yi-Chien; Chen, Yuyang; Gobriel, Sameh; Jain, Nilesh; Krishna Jha, Gopi; Prasanna, Viktor, ARGO: An Auto-Tuning Runtime System for Scalable GNN Training on Multi-Core Processor, IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2024
    4. Lin, Yi-Chien; Deng, Gangda; Prasanna, Viktor, A Unified CPU-GPU Protocol for GNN Training, ACM International Conference on Computing Frontiers, 2024
    5. Xu, Zhihan; Yang, Yang; Kannan, Rajgopal; Prasanna, Viktor K., Bandwidth Efficient Homomorphic Encrypted Discrete Fourier Transform Acceleration on FPGA, 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2024
    6. Parikh, Dhruv; Li, Shouyi; Zhang, Bingyi; Kannan, Rajgopal; Busart, Carl; Prasanna, Viktor, Accelerating ViT Inference on FPGA through Static and Dynamic Pruning, 0, 2024
    7. Zhang, Bingyi; Kannan, Rajgopal; Busart, Carl; Prasanna, Viktor, GCV-Turbo: End-to-end Acceleration of GNN-based Computer Vision Tasks on FPGA, 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2024
    8. Wickramasinghe, Sachini; Parikh, Dhruv; Zhang, Bingyi; Kannan, Rajgopal; Prasanna, Viktor; Busart, Carl, VTR: An Optimized Vision Transformer for SAR ATR Acceleration on FPGA, SPIE Defense + Commercial Sensing, 2024
    9. Lin, Yi-Chien; Zhang, Bingyi; Prasanna, Viktor, HitGNN: High-Throughput GNN Training Framework on CPU+Multi-FPGA Heterogeneous Platform, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2024
    10. Marino, Kyle; Zhang, Pengmiao; Prasanna, Viktor K., ME-ViT: A Single-Load Memory-Efficient FPGA Accelerator for Vision Transformers, 30th IEEE International Conference on High Performance Computing, Data, and Analytics, 2023
    11. Zhang, Bingyi; Wijeratne, Sasindu; Ye, Tian; Kannan, Rajgopal; Prasanna, Viktor; Busart, Carl; Kaplan, Lance, How can Human-in-the-loop Improve the Performance of SAR ATR? A Reinforcement Learning Based Approach, IEEE International Radar Conference 2023, 2023
    12. Ye, Tian; Kannan, Rajgopal; Prasanna, Viktor; Busart, Carl; Kaplan, Lance, Realistic Scatterer Based Adversarial Attacks on SAR Image Classifiers, IEEE International Radar Conference, 2023
    13. Wijeratne, Sasindu; Kannan, Rajgopal; Prasanna, Vikor, Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU, 35th IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2023), 2023
    14. Wiggins, Samuel; Meng, Yuan; Kannan, Rajgopal; Prasanna, Viktor, Characterizing Speed Performance of Multi-agent Reinforcement Learning, 12th International Conference on Data Science and Applications (DATA 2023), 2023
    15. Zhang, Bingyi; Zeng, Hanqing; Prasanna, Viktor, GraphAGILE: An FPGA-Based Overlay Accelerator for Low-Latency GNN Inference, IEEE Transactions on Parallel and Distributed Systems, 2023
    16. Zhang, Bingyi; Prasanna, Viktor, Dynasparse: Accelerating GNN Inference through Dynamic Sparsity Exploitation, 37th IEEE International Parallel & Distributed Processing Symposium, 2023
    17. Lin, Yi-Chien; Prasanna, Vikor, HyScale-GNN: A Scalable Hybrid GNN Training System on Single-Node Heterogeneous Architecture, IEEE International Parallel & Distributed Processing Symposium, 2023
    18. Wiggins, Samuel; Meng, Yuan; Kannan, Rajgopal; Prasanna, Viktor, Evaluating Multi-agent Reinforcement Learning on Heterogeneous Platforms, Proceedings of SPIE Volume 12538, 2023
    19. Yuan Meng; Rajgopal Kannan; Viktor Prasanna, A Framework for Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform via on-chip Dynamic Tree Management, The 31st International Symposium on Field-Programmable Gate Arrays (FPGA 2023), 2023
    20. Wijeratne, Sasindu; Wang, Ta-Yang; Kannan, Rajgopal; Prasanna, Vikor, Accelerating Sparse MTTKRP for Tensor Decomposition on FPGA, The 31st International Symposium on Filed-Programmable Gate Arrays (FPGA 2023), 2023
    21. Zhang, Chi; Meng, Yuan; Prasanna, Viktor, A Framework for Mapping DRL Algorithms with Prioritized Replay Buffer onto Heterogeneous Platforms, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2023
    22. Yik, Jason; Kuppannagari, Sanmukh; Zeng, Hanqing; Prasanna, Vikor, Input Feature Pruning for Accelerating GNN Inference on Heterogeneous Platforms, International Conference on High Performance Computing, Data, and Analytics (HiPC), 2022
    23. Lakhotia, Kartik; Petrini, Fabrizio; Kannan, Rajgopal; Prasanna, Vikor, Accelerating Prefix Scan with in-network computing on Intel PIUMA, International Conference on High Performance Computing, Data, and Analytics (HiPC), 2022
    24. Liu, Haomei; Meng, Yuan; Sanmukh Rao, Kuppannagari; Prasanna, Vikor, End to End Framework for CNN Acceleration on FPGAs with Dynamic Algorithm Mapping, In Proceedings of the 2022 Fourteenth International Conference on Contemporary Computing, 2022
    25. Meng, Yuan; Men, Hongjiang; Prasanna, Viktor, Accelerator Design and Exploration for Deformable Convolution Networks, 2022 IEEE Workshop on Signal Processing Systems (SiPS), 2022
    26. Yang, Yang; Kuppannagari, Sanmukh; Kannan, Rajgopal; Prasanna, Viktor, Bandwidth Efficient Homomorphic Encrypted Matrix Vector Multiplication Accelerator on FPGA, International Conference on Field Programmable Technology, 2022
    27. Jayaraman, Soundarya; Zhang, Bingyi; Prasanna, Viktor, Hypersort: High-performance Parallel Sorting on HBM-enabled FPGA, International Conference on Field Programmable Technology, 2022
    28. Zhang, Bingyi; Zeng, Hanqing; Prasanna, Viktor, Low-latency Mini-batch GNN Inference on CPU-FPGA Heterogeneous Platform, 2022 International Conference on High Performance Computing, Data, and Analytics, 2022
    29. Zhang, Bingyi; Jaiswal, Akhilesh; Mathew, Clynn; Teja Lakkireddy, Ravi; P. Jacob, Ajey; Wijeratne, Sasindu; Prasanna, Viktor, Modeling the Energy Efficiency of GEMM using Optical Random Access Memory, 2022 IEEE High Performance Extreme Computing Virtual Conference, 2022
    30. Wijeratne, Sasindu; Jaiswal, Akhilesh; P. Jacob, Ajey; Zhang, Bingyi; Prasanna, Vikor, Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA, IEEE High Performance Extreme Computing Conference, 2022
    31. Ye, Tian; Rajgopal, Kannan; Prasanna, Viktor K., FPGA Acceleration of Fully Homomorphic Encryption over the Torus, 2022 IEEE High Performance Extreme Computing Virtual Conference, 2022
    32. Zhang, Bingyi; Kannan, Rajgopal; Prasanna, Viktor; Busart, Carl, Accurate, Low-latency, Efficient SAR Automatic Target Recognition on FPGA, 2022 32nd International Conference on Field-Programmable Logic and Applications (FPL), 2022
    33. Meng, Yuan; Kannan, Rajgopal; Prasanna, Viktor, Accelerating Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform, The 32nd International Conference on Field-Programmable Logic and Applications (FPL), 2022
    34. Ye, Tian; Kuppannagari, Sanmukh R.; De Rose, Cesar A. F.; Wijeratne, Sasindu; Kannan, Rajgopal; Prasanna, Viktor K., Estimating the Impact of Communication Schemes for Distributed Graph Processing, 21st IEEE International Symposium on Parallel and Distributed Computing, 2022
    35. Lin, Yi-Chien; Zhang, Bingyi; Prasanna, Viktor, Accelerating GNN Training on CPU+Multi-FPGA Heterogeneous Platform, Latin America High Performance Computing Conference (CARLA), 2022
    36. Wijeratne, Sasindu; Wang, Ta-Yang; Rajgopal, Kannan; Viktor K., Prasanna, Towards Programmable Memory Controller for Tensor Decomposition, 11th International Conference on Data Science and Applications (DATA), 2022
    37. Zhou, Hongkuan; Zhang, Bingyi; Kannan, Rajgopal; Prasanna, Viktor; Busart, Carl, Model-Architecture Co-Design for High Performance Temporal GNN Inference on FPGA, IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2022
    38. Yang, Yang; Kuppannagari, Sanmukh; Kannan, Rajgopal; Prasanna, Viktor, FPGA Accelerator for Homomorphic Encrypted Sparse Convolutional Neural Network Inference, IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2022
    39. Yang, Yang; Kuppannagari, Sanmukh; Kannan, Rajgopal; Prasanna, Viktor, NTTGen: A Framework for Generating Low Latency NTT Implementations on FPGA, 19th ACM International Conference on Computing Frontiers (CF ’22), 2022
    40. Meng, Yuan; Zhang, Chi; Prasanna, Viktor, FPGA Acceleration of Deep Reinforcement Learning using On-Chip Replay Management, 19th ACM International Conference on Computing Frontiers (CF ’22), 2022 (Best Paper Award)
    41. Lin, Yi-Chien; Zhang, Bingyi; Prasanna, Vikor, HP-GNN: Generating High Throughput GNN Training Implementation on CPU-FPGA Heterogeneous Platform, The 30h ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2022
    42. Lakhotia, Kartik; Petrini, Fabrizio; Kannan, Rajgopal; Prasanna, Viktor, Accelerating Allreduce with in-network reduction on Intel PIUMA, IEEE Micro, 2022
    43. Meng, Yuan; Kuppannagari, Sanmukh; Rajgopal, Kannan; Prasanna, Viktor, PPOAccel: A High-Throughput Acceleration Framework for Proximal Policy Optimization, Transactions on Parallel and Distributed Systems (TPDS), 2021
    44. Aggarwal, Madhav; Zhang, Bingyi; Prasanna, Viktor, Performance of Local Push Algorithms for Personalized PageRank on Multi-core Platforms, International Conference on High Performance Computing, Data, and Analytics. (HiPC) 2021, 2021
    45. Meng, Yuan; Kuppannagari, Sanmukh; Rajgopal, Kannan; Prasanna, Viktor, How to Avoid Zero-Spacing in Fractionally-Strided Convolution? A Hardware-Algorithm Co-Design Methodology, International Conference on High Performance Computing, Data, and Analytics. (HiPC), 2021
    46. Zeng, Hanqing; Zhang, Muhan; Xia, Yinglong; Srivastava, Ajitesh; Malevich, Andrey; Kannan, Rajgopal; Prasanna, Viktor; Jin, Long; Chen, Ren, Decoupling the Depth and Scope of Graph Neural Networks, Advances in Neural Information Processing Systems, 2021
    47. Zhang, Bingyi; Kuppannagari, Sanmukh; Kannan, Rajgopal; Prasanna, Viktor, Efficient Neighbor-Sampling-based GNN Training on CPU-FPGA Heterogeneous Platform, IEEE High Performance Extreme Computing Conference, 2021  (Outstanding Student Paper)
    48. Wijeratne, Sasindu; Kannan, Rajgopal; Prasanna, Viktor, Reconfigurable Low-latency Memory System for Sparse Matricized Tensor Times Khatri-Rao Product on FPGA, IEEE High Performance Extreme Computing Conference, 2021
    49. Lin, Yi Chien; Zhang, Bingyi; Prasanna, Viktor K., GCN Inference Acceleration using High-Level Synthesis, IEEE High Performance Extreme Computing Conference, 2021
    50. Ye, Tian; Kuppannagari, Sanmukh R.; Kannan, Rajgopal; Prasanna, Viktor K., Performance Modeling and FPGA Acceleration of Homomorphic Encrypted Convolution, The International Conference on Field-Programmable Logic and Applications (FPL) 2021, 2021
    51. Peura, Nathaniel; Meng, Yuan; Kuppannagari, Sanmukh; Prasanna, Viktor, (Demo Abstract) FGYM: Toolkit for Benchmarking FPGA based Reinforcement Learning Algorithms, International Conference on Field-Programmable Logic and Applications (2021), 2021
    52. Wijeratne, Sasindu; Pattnaik, Sanket; Chen, Zhiyu; Kannan, Rajgopal; Prasanna, Viktor, Programmable FPGA-based Memory Controller, IEEE Hot Interconnects symposium, 2021
    53. Ye, Tian; Yang, Yang; Kuppannagari, Sanmukh R.; Kannan, Rajgopal; Prasanna, Viktor K., FPGA Acceleration of Number Theoretic Transform, ISC High Performance 2021, 2021
    54. Zhang, Bingyi; Kannan, Rajgopal; Prasanna, Viktor, BoostGCN: A Framework for Optimizing GCN Inference on FPGA, 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2021
    55. Meng, Yuan; Kuppannagari, Sanmukh; Kannan, Rajgopal; Prasanna, Viktor, DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference, The 29th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2021), 2021
    56. Yang, Yang; Kuppannagari, Sanmukh; Prasanna, Viktor K., A High Throughput Parallel Hash Table Accelerator on HBM-enabled FPGAs, IEEE ICFPT 2020, 2020
    57. Ye, Tian; Kannan, Rajgopal; Prasanna, Viktor K., Accelerator Design and Performance Modeling for Homomorphic Encrypted CNN Inference, IEEE High Performance Extreme Computing, 2020
    58. Zhang, Ruizhi; Wijeratne, Sasindu; Yang, Yang; Kuppannagari, Sanmukh; Prasanna, Viktor, A High Throughput Parallel Hash Table on FPGA using XOR-based Memory, IEEE HPEC 2020, 2020
    59. Meng, Yuan; Yang, Yang; Kuppannagari, Sanmukh; Kannan, Rajgopal; Prasanna, Viktor, How to Efficiently Train Your AI Agent? Characterizing and Evaluating Deep Reinforcement Learning on Heterogeneous Platforms, 2020 IEEE High Performance Extreme Computing Virtual Conference (HPEC)), 2020
    60. Zhang, Bingyi; Zeng, Hanqing; Prasanna, Viktor, Hardware acceleration of large scale gcn inference, The 31st IEEE International Conference on Application-specific Systems, Architectures and Processors, 2020
    61. Yang, yang; Kuppannagari, Sanmukh R.; Srivastava, Ajitesh; Kannan, Rajgopal; Prasanna, Viktor K., FASTHash: FPGA-based High Throughput Parallel Hash Table, ISC High Performance 2020, 2020
    62. Meng, Yuan; Kuppannagari, Sanmukh; Rajat, Rachit; Srivastava, Ajitesh; Kannan, Rajgopal; Prasanna, Viktor K., QTAccel: A Generic FPGA based Design for Q-Table based Reinforcement Learning Accelerators, 27th Reconfigurable Architectures Workshop (RAW) held at the International Parallel and Distributed Processing Symposium (IPDPS), 2020
    63. Meng, Yuan; Kuppannagari, Sanmukh; Prasanna, Viktor K., Accelerating Proximal Policy Optimization on CPU-FPGA Heterogeneous Platforms, The 28th IEEE International Symposium On Field-Programmable Custom Computing Machines, 2020
    64. Zhang, Bingyi; Zeng, Hanqing; Prasanna, Viktor K., Accelerating Large Scale GCN Inference on FPGA, The 28th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2020
    65. Zeng, Hanqing; Zhou, Hongkuan; Srivastava, Ajitesh; Kannan, Rajgopal; Prasanna, Viktor, GraphSAINT: Graph Sampling Based Inductive Learning Method, International Conference on Learning Representations (ICLR), 2020
    66. Zeng, Hanqing; Prasanna, Viktor, GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platforms, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020
    67. Niu, Yue; Kannan, Rajgopal; Srivastava, Ajitesh; Prasanna, Viktor, Reuse Kernels or Activations? A Flexible Dataflow for Low-latency Spectral CNN Acceleration, ACM/SIGDA International Conference on Field-Programmable Gate Arrays (FPGA), 2020
    68. Zhou, Shijie; Kannan, Rajgopal; Prasanna, Viktor K., Accelerating Stochastic Gradient Descent Based Matrix Factorization on FPGA, IEEE Transactions on Parallel and Distributed Computing, 2020
    69. Niu, Yue; Zeng, Hanqing; Srivastava, Ajitesh; Lakhotia, Kartik; Kannan, Rajgopal; Wang, Yanzhi; Prasanna, Viktor, SPEC2: SPECtral SParsE CNN Accelerator on FPGAs, IEEE International Conference on High Performance Computing (HiPC), 2019
    70. Rajat, Rachit; Zeng, Hanqing; Prasanna, Viktor, A Flexible Design Automation Tool for Accelerating Quantized Spectral CNNs, IEEE International Conference on Field Programmable Logic and Applications (FPL), 2019
    71. Zhou, Hongkuan; Srivastava, Ajitesh; Kannan, Rajgopal; Prasanna, Viktor K., Design and Implementation of Knowledge Base for Runtime Management of Software Defined Hardware, IEEE High Performance Extreme Computing Conference (HPEC), 2019
    72. Goel, Akshit; Kuppannagari, Sanmukh R.; Yang, Yang; Srivastava, Ajitesh; Prasanna, Viktor K., Parallel Totally Induced Edge Sampling on FPGAs, ParaFPGA 2019, 2019
    73. Kuppannagari, Sanmukh R.; Rajat, Rachit; Kannan, Rajgopal; Dasu, Aravind; Prasanna, Viktor K., IP Cores for Graph Kernels on FPGAs, IEEE High Performance Extreme Computing (HPEC), 2019
    74. Zeng, Hanqing; Zhou, Hongkuan; Srivastava, Ajitesh; Kannan, Rajgopal; Prasanna, Viktor K., Accurate, Efficient and Scalable Graph Embedding, 2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2019
    75. Lakhotia, Kartik; Kannan, Rajgopal; Pati, Sourav; Prasanna, Viktor K., GPOP: a cache and memory-efficient framework for graph processing over partitions, Proceedings of the 24th Symposium on Principles and Practice of Parallel Programming, 2019
    76. Lakhotia, Kartik; Kannan, Rajgopal; Gaur, Aditya; Srivastava, Ajitesh; Prasanna, Viktor K., Parallel Edge-based Sampling for Static and Dynamic Graphs, Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
    77. Zhou, Shijie; Kannan, Rajgopal; Prasanna, Viktor K.; Seetharaman, Guna; Wu, Qing, HitGraph: High-throughput Graph Processing Framework on FPGA, IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2019
    78. Sun, Weiyi; Zeng, Hanqing; Yang, Yi-hua Edward; Prasanna, Viktor K., Throughput-Optimized Frequency Domain CNN with Fixed-Point Quantization on FPGA, International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2018
    79. Dong, Qing; Lakhotia, Kartik; Zeng, Hanqing; Kannan, Rajgopal; Prasanna, Viktor; Seetharaman, Guna, A Fast and Efficient Parallel Algorithm for Pruned Landmark Labeling, IEEE High Performance Extreme Computing Conference (HPEC), 2018
    80. Lakhotia, Kartik; Kannan, Rajgopal; Prasanna, Viktor K., Accelerating PageRank using Partition-Centric Processing, USENIX Annual Technical Conference (USENIX ATC 18), 2018
    81. Zhou, Shijie; Kannan, Rajgopal; Zeng, Hanqing; Prasanna, Viktor K., An FPGA Framework for Edge-Centric Graph Processing, Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
    82. Tong, Da; Prasanna, Viktor K., Sketch Acceleration on FPGA and its Applications in Network Anomaly Detection, IEEE Transactions on Parallel & Distributed Systems, 2018
    83. Zeng, Hanqing; Chen, Ren; Zhang, Chi; Prasanna, Viktor K., A Framework for Generating High Throughput CNN Implementations on FPGAs, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018
    84. Zhou, Shijie; Kannan, Rajgopal; Yu, Min; Prasanna, Viktor K., FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018
    85. Zeng, Hanqing; Zhang, Chi; Prasanna, Viktor K., Fast Generation of High Throughput Customized Deep Learning Accelerators on FPGAs, International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2017
    86. Zhou, Shijie; Kannan, Rajgopal; Prasanna, Viktor K., Accelerating Low Rank Matrix Completion on FPGA, International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2017
    87. Chen, Ren; Prasanna, Viktor K., Computer Generation of High Throughput and Memory Efficient Sorting Designs on FPGA, IEEE Transactions on Parallel and Distributed Systems, 2017
    88. Tong, Da; Qu, Yun R.; Prasanna, Viktor K., Accelerating Decision Tree Based Traffic Classification on FPGA and Multicore Platforms, IEEE Transactions on Parallel and Distributed Systems, 2017
    89. Lakhotia, Kartik; Singapura, Shreyas; Kannan, Rajgopal; Prasanna, Viktor K., ReCALL: Reordered Cache Aware Locality based Graph Processing, IEEE International Conference on High Performance Computing, Data and Analytics, 2017
    90. Zhou, Shijie; Prasanna, Viktor K., Accelerating Graph Analytics on CPU-FPGA Heterogeneous Platform, IEEE 29th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2017
    91. Singapura, Shreyas; Srivastava, Ajitesh; Kannan, Rajgopal; Prasanna, Viktor K., OSCAR: Optimizing SCrAtchpad Reuse for Graph Processing, IEEE 21st International Conference on High Performance Extreme Computing (HPEC), 2017
    92. Singapura, Shreyas; Kannan, Rajgopal; Prasanna, Viktor K., Optimal Data Layout for Block-Level Random Accesses to Scratchpad, IEEE 21st International Conference on High Performance Extreme Computing (HPEC), 2017
    93. Zhou, Shijie; Lakhotia, Kartik; Singapura, Shreyas G.; Zeng, Hanqing; Kannan, Rajgopal; Prasanna, Viktor K.; Fox, James; Kim, Euna; Green, Oded; Bader, David A., Design and Implementation of Parallel PageRank on Multicore Platforms, IEEE 21st International Conference on High Performance Extreme Computing (HPEC), 2017
    94. Green, Oded; Fox, James; Kim, Euna; Busato, Federico; Bombieri, Nicola; Lakhotia, Kartik; Zhou, Shijie; Singapura, Shreyas; Zeng, Hanqing; Kannan, Rajgopal; Prasanna, Viktor K.; Bader, David, Quickly Finding a Truss in a Haystack, IEEE 21st International Conference on High Performance Extreme Computing (HPEC), 2017
    95. Podili, Abhinav; Zhang, Chi; Prasanna, Viktor K., Fast and Efficient Implementation of Convolutional Neural Networks, IEEE 28th International Conference on Application-specific Systems, Architectures and Processors, 2017
    96. Zhang, Chi; Prasanna, Viktor K., Frequency Domain Acceleration of Convolutional Neural Networks on CPU-FPGA Shared Memory System, 25th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2017
    97. Chen, Ren; Prasanna, Viktor K., Optimal Circuits for Parallel Bit Reversal, Proceedings of the 54th Annual Design Automation Conference (DAC), 2017
    98. Chen, Ren; Prasanna, Viktor K., Optimizing interconnection complexity for realizing fixed permutation in data and signal processing algorithms, IEEE International Conference on Field Programmable Logic and Applications (FPL ’16), 2016
    99. Singapura, Shreyas G.; Kannan, Rajgopal; Prasanna, Viktor K., On-chip Memory Efficient Data Layout for 2D FFT on 3D Memory Integrated FPGA, IEEE 20th Annual High Performance Extreme Computing Conference (HPEC), 2016
    100. Chen, Ren; Singapura, Shreyas; Prasanna, Viktor K., Optimal Dynamic Data Layouts for 2D FFT on 3D Memory Integrated FPGA, Journal of Supercomputing (SUPE), 2016
    101. Zhang, Chi; Chen, Ren; Prasanna, Viktor K., High Throughput Large Scale Sorting on a CPU-FPGA Heterogeneous Platform, 30th Annual International Parallel and Distributed Processing Symposium (23rd Reconfigurable Architectures Workshop), 2016
    102. Zhou, Shijie; Prasanna, Viktor K., High-Throughput and Energy-Efficient Graph Processing on FPGA, 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2016
    103. Zois, Vasileios; Panangadan, Anand; Prasanna, Viktor K., Accelerating Support Count for Association Rule Mining on GPUs, 5th International Workshop on Parallel and Distributed Computing for Large Scale Machine Learning and Big Data Analytics (ParLearning), IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2016
    104. Chen, Ren; Prasanna, Viktor K., Accelerating Equi-Join on a CPU-FPGA Heterogeneous Platform, 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2016
    105. Qu, Yun R.; Prasanna, Viktor K., Compact Hash Tables for Decision-trees, Journal paper at Parallel Computing (PARCO), 2016
    106. Qu, Yun R.; Prasanna, Viktor K., Fast Online Set Intersection for Network Processing on FPGA, IEEE Transactions on Parallel and Distributed Systems, 2016
    107. Singapura, Shreyas G.; Yang, Yi-Hua E.; Panangadan, Anand; Nemeth, Tamas; Ng, Peter; Prasanna, Viktor K., FPGA-based Acceleration of Pattern Matching in YARA, 12th International Symposium on Applied Reconfigurable Computing, 2016
    108. Qu, Yun R.; Prasanna, Viktor K., High-performance and Dynamically Updatable Packet Classification Engine on FPGA, IEEE Transactions on Parallel and Distributed Systems, 2016
    109. Zhou, Shijie; Prasanna, Viktor K., Scalable GPU-Accelerated IPv6 Lookup using Hierarchical Perfect Hashing, IEEE Global Communications Conference (GLOBECOM ’15), 2015
    110. Zhou, Shijie; Chelmis, Charalampos; Prasanna, Viktor K., Optimizing Memory Performance for FPGA Implementation of PageRank, IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig ’15), 2015
    111. Tong, Da; Prasanna, Viktor K., High Throughput Hierarchical Heavy Hitter Detection in Data Streams, Proceedings of the 22nd Annual IEEE International Conference on High Performance Computing (HiPC ’15), 2015
    112. Tong, Da; Prasanna, Viktor K., High Throughput Sketch Based Online Heavy Change Detection on FPGA, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig ’15), 2015
    113. Srivastava, Ajitesh; Chen, Ren; Chelmis, Charalampos; Prasanna, Viktor K., A Hybrid Design for High Performance Large-scale Sorting on FPGA, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig ’15), 2015
    114. Chen, Ren; Prasanna, Viktor K., Automatic Generation of High Throughput Energy Efficient Streaming Architectures for Arbitrary Fixed Permutations, IEEE International Conference on Field-programmable Logic and Applications (FPL ’15), 2015
    115. Qu, Yun R.; Prasanna, Viktor K., Power-efficient Range-match-based Packet Classification on FPGA, IEEE International Conference on Field-programmable Logic and Applications (FPL), 2015
    116. Zhou, Shijie; Qu, Yun R.; Prasanna, Viktor K., Large-scale Packet Classification on FPGA, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ’15), 2015
    117. Singapura, Shreyas G.; Panangadan, Anand; Prasanna, Viktor K., Performance Modeling of Matrix Multiplication on 3D Memory Integrated FPGA, 22nd Reconfigurable Architectures Workshop (RAW), 29th Annual International Parallel & Distributed Processing Symposium (IPDPS), 2015
    118. Qu, Yun R.; Zhang, Hao H.; Zhou, Shijie; Prasanna, Vikor K., Optimizing Many-field Packet Classification on FPGA, multi-core General Purpose Processor, and GPU, ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2015
    119. Qu, Yun R.; Prasanna, Viktor K., Enabling High Throughput and Virtualization for Traffic Classification on FPGA, IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2015
    120. Wickramaarachchi, Charith; Chelmis, Charalampos; Prasanna, Viktor K., Empowering Fast Incremental Computation over Large Scale Dynamic Graphs, IEEE International Parallel & Distributed Processing Symposium (IPDPS) ParLearning Workshop, 2015
    121. Zhou, Shijie; Chelmis, Charalampos; Prasanna, Viktor K., Accelerating Large-Scale Single-Source Shortest Path on FPGA, 22nd Reconfigurable Architectures Workshop (RAW), 29th Annual International Parallel & Distributed Processing Symposium (IPDPS), 2015
    122. Singapura, Shreyas G.; Panangadan, Anand; Prasanna, Viktor K., Towards Performance Modeling of 3D Memory Integrated FPGA Architectures, 11th International Symposium on Applied Reconfigurable Computing (ARC), 2015
    123. Chen, Ren; Prasanna, Viktor K., DRAM Row Activation Energy Optimization for Stride Memory Access on FPGA-based Systems, 11th International Symposium on Applied Reconfigurable Computing (ARC), 2015
    124. Chen, Ren; Prasanna, Viktor K., Energy and Memory Efficient Bitonic Sorting on FPGA, ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2015
    125. Kuppannagari, Sanmukh R.; Prasanna, Viktor K., Efficient Generation of Energy and Performance Pareto Front for FPGA Designs, ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2015
    126. Gandhi, Vaibhav R.; Qu, Yun R.; Prasanna, Viktor K., High-Throughput Hash-based Online Traffic Classification Engines on FPGA, IEEE International Conference on Reconfigurable Computing and FPGAs (ReConfig), 2014
    127. Sanny, Andrea; Yang, Yi-Hua E.; Prasanna, Viktor K., Energy-Efficient Histogram on FPGA, IEEE International Conference on Reconfigurable Computing and FPGAs (ReConfig), 2014
    128. Qu, Yun R.; Zhou, Shijie; Prasanna, Viktor K., A Decomposition-based Approach for Scalable Many-field Packet Classification on Multi-core Processors, International Journal of Parallel Programming (IJPP), 2014
    129. Zhou, Shijie; Zhao, Sihan; Prasanna, Viktor K., 400 Gbps Energy-Efficient Multi-Field Packet Classification on FPGA, IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2014
    130. Zhou, Shijie; Jiang, Weirong; Prasanna, Viktor K., A Flexible and Scalable High-Performance OpenFlow Switch on Heterogeneous SoC Platforms, International Performance, Computing, and Communications Conference (IPCCC), 2014
    131. Kuppannagari, Sanmukh R.; Hu, Yusong; Prasanna, Viktor K., High Level Performance Model Based Design Space Exploration for Energy-Efficient Designs on FPGAs, 5th International Green Computing Conference (IGCC), 2014
    132. Chen, Ren; Prasanna, Viktor K., Algorithmic Optimizations for Energy-efficient Throughput-oriented FFT architecture, 5th International Green Computing Conference (IGCC), 2014
    133. Zhou, Shijie; Nittoor, Prashant Rao; Prasanna, Viktor K., High-Performance Traffic Classification on GPU, IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2014
    134. Qu, Yun; Prasanna, Viktor K., Compact Hash Tables for High-performance Traffic Classification on Multi-core Processors, IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2014
    135. Qu, Yun; Prasanna, Viktor K., Scalable and Dynamically Updatable Lookup Engine for Decision-trees on FPGA, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    136. Kuppannagari, Sanmukh R.; Singapura, Shreyas G.; Chen, Ren; Sanny, Andrea; Tran, Geoffrey Phi C.; Zhou, Shijie; Hu, Yusong; Crago, Stephen P.; Prasanna, Viktor K., Energy Performance of FPGAs on PERFECT Suite Kernels, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    137. Sanny, Andrea; Prasanna, Viktor K., Energy-Efficient Histogram Equalization on FPGA, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    138. Zhou, Shijie; Singapura, Shreyas G.; Prasanna, Viktor K., High-Performance Packet Classification on GPU, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    139. Chen, Ren; Prasanna, Viktor K., Energy Optimizations for FPGA-based 2-D FFT Architecture, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    140. Kumbhare, Alok; Frincu, Marc; Raghavendra, Cauligi S.; Prasanna, Viktor K., Efficient Extraction of High Centrality Vertices in Distributed Graphs, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    141. Wickramaarachchi, Charith; Frincu, Marc; Small, Patrick; Prasanna, Viktor K., Fast Parallel Algorithm for Unfolding of Communities in Large Graphs, IEEE 18th International Conference on High Performance Extreme Computing (HPEC), 2014
    142. Zhou, Shijie; Jiang, Weirong; Prasanna, Viktor K., A Programmable and Scalable OpenFlow Switch using Heterogeneous SoC Platforms, ACM SIGCOMM Workshop on Hot Topics in Software Defined Networking (HotSDN), 2014
    143. Qu, Yun; Zhou, Shijie; Prasanna, Viktor K., Performance Modeling and Optimizations for Decomposition-based Large-scale Packet Classification on Multi-core Processors, IEEE 15th International Conference on High Performance Switching and Routing (HPSR), 2014
    144. Qu, Da Tong; Yun; Prasanna, Viktor K., High-throughput Traffic Classification on Multi-core Processors, IEEE 15th International Conference on High Performance Switching and Routing (HPSR), 2014
    145. Chu, Hsuan-Yi; Xia, Yinglong; Panangadan, Anand; Prasanna, Viktor K., Wait-Free Primitives for Initializing Bayesian Network Structure Learning on Multicore Processors, 3rd International Workshop on Parallel and Distributed Computing for Large Scale Machine Learning and Big Data Analytics (ParLearning), 28th IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2014
    146. Ganegedara, Thilan; Prasanna, Viktor K., 100+ Gbps IPv6 Packet Forwarding on Multi-Core Platforms, IEEE Global Communications Conference (GLOBECOM), 2013
    147. Haria, Swapnil; Prasanna, Viktor K., Optimal mapping of multiple packet lookup schemes onto FPGA, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2013
    148. Sanny, Andrea; Prasanna, Viktor K., Energy-Efficient Median Filter on FPGA, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2013
    149. Tong, Da; Prasanna, Viktor K., Online heavy hitter detector on FPGA, IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2013
    150. Matam, Kiran Kumar; Prasanna, Viktor K., Energy-Efficient Large-Scale Matrix Multiplication on FPGAs, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2013
    151. Chen, Ren; Prasanna, Viktor K., Energy-Efficient Architecture for Stride Permutation on Streaming Data, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2013
    152. Qu, Yun; Zhou, Shijie; Prasanna, Viktor K., Scalable Many-field Packet Classification on Multi-core Processors, International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2013
    153. Qu, Yun; Zhou, Shijie; Prasanna, Viktor K., High-performance Architecture for Dynamically Updatable Packet Classification on FPGA, ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2013
    154. Matam, Kiran Kumar; Le, Hoang; Prasanna, Viktor K., Evaluating Energy Efficiency of Floating Point Matrix Multiplication on FPGAs, IEEE High Performance Extreme Computing Conference (HPEC), 2013
    155. Tong, Da; Prasanna, Viktor K., Dynamically configurable online statistical flow feature extractor on FPGA, IEEE International Conference on High Performance Extreme Computing (HPEC), 2013
    156. Zhou, Shijie; Qu, Yun; Prasanna, Viktor K., Multi-core Implementation of Decomposition-based Packet Classification Algorithms, International Conference on Parallel Computing Techniques (PaCT), 2013
    157. Chen, Ren; Park, Neungsoo; Prasanna, Viktor K., High Throughput Energy Efficient Parallel FFT Architecture on FPGAs, IEEE High Performance Extreme Computing Conference (HPEC), 2013
    158. Chen, Ren; Le, Hoang; Prasanna, Viktor K., Energy Efficient Parameterized FFT Architecture, IEEE International Conference on Field Programmable Logic and Applications (FPL), 2013
    159. Matam, Kiran Kumar; Le, Hoang; Prasanna, Viktor K., Energy Efficient Architecture for Matrix Multiplication on FPGAs, IEEE International Conference on Field Programmable Logic and Applications (FPL), 2013
    160. Yang, Yi-Hua E.; Qu, Yun; Haria, Swapnil; Prasanna, Viktor K., Architecture and Performance Models for Scalable IP Lookup Engines on FPGA, International Conference on High Performance Switching and Routing (HPSR), 2013
    161. Qu, Yun; Prasanna, Viktor K., Fast Dynamically Updatable Packet Classifier on FPGA, International Conference on Field Programmable Logic and Applications (FPL), 2013
    162. Matam, Kiran Kumar; Prasanna, Viktor K., Algorithm Design Methodology for Embedded Architectures, International Symposium on Applied Reconfigurable Computing (ARC), 2013
    163. Tong, Da; Sun, Lu; Matam, Kiran; Prasanna, Viktor K., High throughput and programmable online traffic classifier on FPGA, the ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2013
    164. Haria, Swapnil; Prasanna, Viktor K., AutoMapper: an automated tool for optimal hardware resource allocation for networking applications on FPGA, the ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2013
    165. Qu, Yun; Prasanna, Viktor K., High-performance Pipelined Architecture for Tree-based IP lookup Engine on FPGA, Reconfigurable Architectures Workshop (RAW), 2013
    166. Sanny, Andrea; Ganegedara, Thilan; Prasanna, Viktor K., A Comparison of Ruleset Feature Independent Packet Classification Engines on FPGA, Reconfigurable Architectures Workshop (RAW), 2013
    167. Redekopp, Mark; Simmhan, Yogesh; Prasanna, Viktor K., Optimizations and Analysis of BSP Graph Processing Models on Public Clouds, IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2013
    168. Haria, Swapnil; Ganegedara, Thilan; Prasanna, Viktor K., Power Efficient and Scalable Virtual Routers on FPGA, International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012
    169. Ma, Nam; Xia, Yinglong; Prasanna, Viktor K., Parallel Exact Inference on Multicore Using MapReduce, 24nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2012
    170. Jiang, Weirong; Prasanna, Viktor K., Scalable Packet Classification on FPGA, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2012
    171. Ganegedara, Thilan; Prasanna, Viktor K.; Brebner, Gordon, Optimizing Packet Lookup in Time and Space on FPGA, 22nd International Conference on Field Programmable Logic and Applications (FPL ), 2012
    172. Le, Hoang; Prasanna, Viktor K., Scalable Tree-based Architectures for IPv4/v6 Lookup Using Prefix Partitioning, IEEE Transactions on Computers, 2012
    173. Xia, Yinglong; Prasanna, Viktor K., Distributed Evidence Propagation in Junction Trees on Clusters, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2012
    174. Yang, Yi-Hua E.; Prasanna, Viktor K., High-Performance and Compact Architecture for Regular Expression Matching on FPGA, IEEE Transactions on Computers, 2012
    175. Yang, Yi-Hua E.; Prasanna, Viktor K., Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multi-core Processors, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2012
    176. Ganegedara, Thilan; Prasanna, Viktor K., StrideBV: Single Chip 400G+ Packet Classification, 13th International Conference on High Performance Switching and Routing (HPSR), 2012
    177. Qu, Yun; Yang, Yi-Hua E.; Prasanna, Viktor K., Large-scale multi-flow regular expression matching on FPGA, 13th International Conference on High Performance Switching and Routing (HPSR), 2012
    178. Ma, Nam; Xia, Yinglong; Prasanna, Viktor K., Task Parallel Implementation of Belief Propagation in Factor Graphs, Workshop on Parallel and Distributed Computing for Machine Learning and Inference Problems (ParLearning – in conjunction with IPDPS’12), 2012
    179. Ganegedara, Thilan; Prasanna, Viktor K., FPGA-based Router Virtualization: A Power Perspective, 19th Reconfigurable Architectures Workshop (RAW ), 2012
    180. Le, Hoang; Prasanna, Viktor K., A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching, IEEE Transactions on Computers, 2012
    181. Jiang, Weirong; Prasanna, Viktor K., Data Structure Optimization for Power-Efficient IP Lookup Architectures, IEEE Transactions on Computers, 2012
    182. Tong, Da; Yang, Yi-Hua; Prasanna, Viktor K., A Memory Efficient IPv6 Lookup Engine on FPGA, International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012
    183. Redekopp, Mark; Simmhan, Yogesh; Prasanna, Viktor K., Performance Analysis of Vertex-centric Graph Algorithms on the Azure Cloud Platform, Workshop on Parallel Algorithms and Software for Analysis of Massive Graphs (ParGraph ’11), 2011
    184. Sun, Lu; Le, Hoang; Prasanna, Viktor K., Optimizing Decomposition-based Packet Classification Implementation on FPGAs, International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2011
    185. Qu, Yun; Yang, Yi-Hua E.; Prasanna, Viktor K., Multi-stream Regular Expression Matching on FPGA, International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2011
    186. Yang, Yi-Hua E.; Prasanna, Viktor K., Optimizing Regular Expression Matching with SR-NFA on Multi-Core Systems, Parallel Architectures and Compilation Techniques (PACT ’11), 2011
    187. Ma, Nam; Xia, Yinglong; Prasanna, Viktor K., Data Parallelism for Belief Propagation in Factor Graphs, 23nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD ’11), 2011
    188. Ganegedara, Thilan; Le, Hoang; Prasanna, Viktor K., Towards On-the-fly Incremental Updates for Virtualized Routers on FPGA, 21st Annual International Conference on Field-Programmable Logic and Applications (FPL ’11), 2011
    189. Zhao, Jing; Gomadam, Karthik; Prasanna, Viktor K., Predicting Missing Provenance using Semantic Associations in Reservoir Engineering, IEEE International Conference on Semantic Computing (ICSC ’11), 2011
    190. Erdem, Oguzhan; Le, Hoang; Prasanna, Viktor K., Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs, 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ’11), 2011
    191. Erdem, Oguzhan; Le, Hoang; Prasanna, Viktor K., Clustered Parameterized Hierarchical Search Structure for Large-Scale Packet Classification on FPGA, 21st Annual International Conference on Field-Programmable Logic and Applications (FPL ’11), 2011
    192. Ganegedara, Thilan; Jiang, Weirong; Prasanna, Viktor K., Multiroot: Towards Memory-Efficient Router Virtualization, IEEE International Conference on Communications (ICC ’11), 2011
    193. Zinn, Daniel; Hart, Quinn; McPhillips, Timothy; Ludascher, Bertram; Simmhan, Yogesh; Giakkoupis, Michail; Prasanna, Viktor K., Towards Reliable, Performant Workflows for Streaming-Applications on Cloud Platforms, 11th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid ’11), 2011
    194. Xia, Yinglong; Prasanna, Viktor K., Self-adaptive Evidence Propagation on Manycore Processors, Workshop on Parallel and Distributed Scientific and Engineering Computing (PDSEC ’11), 2011
    195. Le, Hoang; Jiang, Weirong; Prasanna, Viktor K., Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path Compression, 19th IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’11), 2011
    196. Yang, Yi-Hua E.; Erdem, Oguzhan; Prasanna, Viktor K., High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search, 19th Intl. IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM ’11), 2011
    197. Ma, Nam; Xia, Yinglong; Prasanna, Viktor K., Exploring Weak Dependencies in DAG Scheduling for Exact Inference, Advances in Parallel and Distributed Computing Models (APDCM ’11), 2011
    198. Yang, Y.-H. E.; Prasanna, Viktor K., Space-Time Trade off in Regular Expression Matching with Semi-Deterministic Finite Automata, 30th Conference on Computer Communications (INFOCOM ’11), 2011
    199. Le, Hoang; Ganegedara, Thilan; Prasanna, Viktor K., Memory-Efficient and Scalable Virtual Routers Using FPGA, 19th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA ’11), 2011
    200. Xia, Yinglong; Prasanna, Viktor K., Scheduling DAG Structured Computations, Multi- and Many-Core Technologies: Architecture, Programming, Algorithms, & Applications, Chapman & Hall / CRC, 2011
    201. Xia, Yinglong; Prasanna, Viktor K., Parallel Evidence Propagation on Multicore Processors, Journal of Supercomputing, 2011
    202. Jiang, Weirong; Prasanna, Viktor K., Energy-Efficient Parallel Packet Forwarding, Green IT: Technologies and Applications, Springer, 2011
    203. Jiang, Weirong; Prasanna, Viktor K., Energy Efficient Internet Infrastructure, Energy Efficient Distributed Computing Systems, Wiley, 2011
    204. Simmhan, Yogesh; Giakkoupis, Michail; Cao, Baohua; Prasanna, Viktor K., On Using Cloud Platforms in a Software Architecture for Smart Energy Grids, IEEE International Conference on Cloud Computing Technology and Science (CloudCom ’10), 2010
    205. Le, Hoang; Prasanna, Viktor K., High-Throughput IP-Lookup Supporting Dynamic Routing Tables using FPGA, International Conference on Field-Programmable Technology (FPT ’10), 2010
    206. Ganegedara, Thilan; Jiang, Weirong; Prasanna, Viktor K., FRuG: A Benchmark for Packet Forwarding in Future Networks, 29th IEEE International Performance Computing and Communications Conference (IPCCC’10), 2010
    207. Ma, Nam; Xia, Yinglong; Prasanna, Viktor K., Exact Inference on Manycore Processors Using Pointer Jumping, 22nd International Conference on Parallel and Distributed Computing and Systems (PDCS ’10), 2010
    208. Xia, Yinglong; Prasanna, Viktor K., Distributed Evidence Propagation in Junction Trees, 22nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD ’10), 2010
    209. Jeon, Hyeran; Xia, Yinglong; Prasanna, Viktor K., Parallel Exact Inference on a CPU-GPGPU Heterogeneous System, International Conference on Parallel Processing (ICPP ’10), 2010
    210. Jiang, Weirong; Prasanna, Viktor K.; Yamagaki, Norio, Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA, 20th IEEE International Conference on Field Programmable Logic and Applications (FPL ’10), 2010
    211. Ganegedara, Thilan; Yang, Yi-Hua E.; Prasanna, Viktor K., Automation Framework for Large-Scale Regular Expression Matching on FPGA, 20th IEEE International Conference on Field Programmable Logic and Applications (FPL ’10), 2010
    212. Pathak, Animesh; Prasanna, Viktor K., Energy-Efficient Task Mapping for Data-driven Sensor Network Macroprogramming, IEEE Transactions on Computers, 2010
    213. Jeon, Hyeran; Xia, Yinglong; Prasanna, Viktor K., Node Level Primitives for Exact Inference on GPGPU, 17th International Conference on Systems, Signals and Image Processing (IWSSIP ’10), 2010
    214. Jiang, Weirong; Prasanna, Viktor K., Architecture-Aware Data Structure Optimization for Power-Efficient IP Lookup, 11th IEEE International Conference on High Performance Switching and Routing (HPSR ’10), 2010
    215. Xia, Yinglong; Prasanna, Viktor K., Collaborative Scheduling of DAG Structured Computations on Multicore Processors, ACM Computing Frontiers (CF ’10), 2010
    216. Jiang, Weirong; Yang, Yi-Hua E.; Prasanna, Viktor K., Scalable Multi-Pipeline Architecture for High Performance Multi-Pattern String Matching, IEEE International Parallel and Distributed Processing Symposium (IPDPS ’10), 2010
    217. Xia, Yinglong; Prasanna, Viktor K.; Li, James, Hierarchical Scheduling of DAG Structured Computations on Manycore Processors with Dynamic Thread Grouping, 15th Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP ’10), held in conjunction with IPDPS, 2010
    218. Yang, Yi-Hua E.; Prasanna, Viktor K.; Jiang, Chenqian, Head-Body Partitioned String Matching for Deep Packet Inspection with Scalable and Attack-Resilient Performance, IEEE International Parallel and Distributed Processing Symposium (IPDPS ’10), 2010
    219. Le, Hoang; Prasanna, Viktor K., A Memory-Efficient and Modular Approach for String Matching on FPGAs, 18th IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’10), 2010
    220. Jiang, Weirong; Prasanna, Viktor K., Towards Practical Architectures for SRAM-based Pipeline Lookup Engines, 29th Conference on Computer Communications (INFOCOM ’10), 2010
    221. Yang, Yi-Hua E.; Le, Hoang; Prasanna, Viktor K., High Performance Dictionary-Based String Matching for Deep Packet Inspection, 29th Conference on Computer Communications (INFOCOM ’10), 2010
    222. Le, Hoang; Yang, Yi-Hua E.; Prasanna, Viktor K., Memory Efficient String Matching: A Modular Approach on FPGAs, 18th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA ’10), 2010
    223. Yang, Yi-Hua E.; Prasanna, Viktor K., High Throughput and Large Capacity Pipelined Dynamic Search Tree on FPGA, 18th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA ’10), 2010
    224. Xia, Yinglong; Prasanna, Viktor K., Scalable Node Level Computation Kernels for Parallel Exact Inference, IEEE Transactions on Computers, 2010
    225. Xia, Yinglong; Prasanna, Viktor K., Parallel Exact Inference on the Cell Broadband Engine Processor, Journal of Parallel and Distributed Computing, 2010
    226. Xia, Yinglong; Prasanna, Viktor K., Topologically Adaptive Parallel Breadth-first Search on Multicore Processors, 21st International Conference on Parallel and Distributed Computing and Systems (PDCS ’09), 2009
    227. Jiang, Weirong; Prasanna, Viktor K., Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification, the IEEE Global Communications Conference (Globecom ’09), 2009
    228. Xia, Yinglong; Prasanna, Viktor K., Accelerating Exact Inference on Probabilistic Graphical Models on Multicore Processors, Asian Technology Information Program: Research Challenges on Computing in India, 2009
    229. Wagner, Jeffrey M.; Jiang, Weirong; Prasanna, Viktor K., A Scalable Pipeline Architecture for Line Rate Packet Classification on FPGAs, 21st IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS ’09), 2009
    230. Jiang, Weirong; Prasanna, Viktor K., Reducing Dynamic Power Dissipation in Pipelined Forwarding Engines, 27th IEEE International Conference on Computer Design (ICCD ’09), 2009
    231. Jiang, Weirong; Prasanna, Viktor K., Sequence-Preserving Parallel IP Lookup using Multiple SRAM-based Pipelines, Journal of Parallel and Distributed Computing, 2009
    232. Jiang, Weirong; Prasanna, Viktor K., Scalable Packet Classification: Cutting or Merging?, 18th IEEE International Conference on Computer Communications and Networks (ICCCN ’09), 2009
    233. Vinjamuri, Sudhir; Prasanna, Viktor K., Hierarchical Dependency Graphs: Abstraction and Methodology for Mapping Systolic Array Designs to Multicore Processors, 10th International Conference on Parallel Computing Technologies (PaCT’09), 2009
    234. Jiang, Weirong; Prasanna, Viktor K., Field-Split Parallel Architecture for High Performance Multi-Match Packet Classification Using FPGAs, 21st ACM Symposium on Parallelism in Algorithms and Architectures (SPAA ’09), 2009
    235. Jiang, Weirong; Prasanna, Viktor K., A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification, 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ’09), 2009
    236. Vinjamuri, Sudhir; Prasanna, Viktor K., Transitive Closure on the Cell Broadband Engine: A study on Self-Scheduling in a Multicore Processor, 23rd IEEE International Parallel and Distributed Processing Symposium (IPDPS ’09), 2009
    237. Le, Hoang; Prasanna, Viktor K., Scalable High Throughput and Power Efficient IP-Lookup on FPGA, 17th IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’09), 2009
    238. Wang, Qingbo; Prasanna, Viktor K., Multi-core Architecture on FPGA for Large Dictionary String Matching, 17th IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’09), 2009
    239. Yang, Yi-Hua E.; Prasanna, Viktor K., Memory-Efficient Pipelined Architecture for Large-Scale String Matching, 17th IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’09), 2009
    240. Jiang, Weirong; Prasanna, Viktor K., Large-Scale Wire-Speed Packet Classification on FPGAs, 17th ACM International Symposium on Field-Programmable Gate Arrays (FPGA ’09), 2009
    241. Yang, Yi-Hua E.; Prasanna, Viktor K., Software Toolchain for Large-Scale RE-NFA Construction on FPGA, International Journal of Reconfigurable Computing, 2009
    242. Jiang, Weirong; Prasanna, Viktor K., Towards Green Routers: Depth-Bounded Multi-Pipeline Architecture for Power-Efficient IP Lookup, IEEE International Performance Computing and Communications Conference (IPCCC ’08), 2008
    243. Zhuo, Ling; Prasanna, Viktor K., Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems, IEEE Transactions on Computers, 2008
    244. Yang, Yi-Hua E.; Prasanna, Viktor K., Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA, International Conference on Reconfigurable Computing and FPGAs (ReConFig ’08), 2008
    245. Zhao, Jing; Sun, Fan; Torniai, Carlo; Bakshi, Amol; Prasanna, Viktor K., A Provenance-Integration Framework for Distributed Workflows in Grid Environments, Workshop on Grid and Utility Computing (WUGC), 2008
    246. Yang, Yi-Hua E.; Jiang, Weirong; Prasanna, Viktor K., Compact Architecture for High-Throughput Regular Expression Matching on FPGA, ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS’ 08), 2008
    247. Le, H.; Jiang, W.; Prasanna, Viktor K., Scalable High-Throughput Sram-Based Architecture for IP-Lookup Using FPGA, 18th Annual International Conference on Field-Programmable Logic and Applications (FPL ’08), 2008
    248. Soma, Ramakrishna; Prasanna, Viktor K., Parallel Inferencing for OWL Knowledge Bases, 37th International Conference on Parallel Processing (ICPP ’08), 2008
    249. Soma, R.; Prasanna, Viktor K., A Data Partitioning Approach for Parallelizing Rule Based Inferencing for Materialized OWL Knowledge Bases, USA International Conference on Parallel and Distributed Computing and Communication Systems (PDCCS), 2008
    250. Zhuo, Ling; Prasanna, Viktor K., High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware, IEEE Transactions on Computers, 2008
    251. Pathak, Animesh; Zhou, Qunzhi; Prasanna, Viktor K., Srijan: A Graphical Toolkit for WSN Application Development, 4th IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS ’08), 2008
    252. Jiang, Weirong; Prasanna, Viktor K., Multi-Terabit IP Lookup Using Parallel Bidirectional Pipelines, Computing Frontier (CF), 2008
    253. Bakshi, Amol; Prasanna, Viktor K.; Reich, J.; Larner, D., Architecture-Independent Programming for Wireless Sensor Networks, Wiley-Interscience, 2008
    254. Jiang, Weirong; Prasanna, Viktor K., Parallel IP Lookup using Multiple SRAM-based Pipelines, IEEE International Parallel & Distributed Processing Symposium (IPDPS ’08), 2008
    255. Zhuo, Ling; Wang, Qingbo; Prasanna, Viktor K., Matrix Computations on Heterogeneous Reconfigurable Systems, 16th Annual IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’08), 2008
    256. Xia, Yinglong; Prasanna, Viktor K., Junction Tree Decomposition for Parallel Exact Inference, IEEE International Parallel & Distributed Processing Symposium (IPDPS ’08), 2008
    257. Jiang, Weirong; Wang, Qingbo; Prasanna, Viktor K., Beyond TCAMs: An SRAM-based Multi-Pipeline Architecture for Terabit IP Lookup, IEEE InfoCom, 2008
    258. Le, H.; Jiang, W.; Prasanna, Viktor K., A SRAM-based Architecture for Trie-based IP Lookup Using FPGA, 16th Annual IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’08), 2008
    259. Yu, Yang; Krishnamachari, Bhaskar; Prasanna, Viktor K., Data Gathering with Tunable Compression in Sensor Networks, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2008
    260. Scrofano, Ronald; Zhuo, Ling; Prasanna, Viktor K., Area-Efficient Evaluation of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2008
    261. Ou, Jingzhao; Prasanna, Viktor K., A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors, IEEE Transactions on Very Large Integration Systems (TVLSI), 2008
    262. Xia, Yinglong; Prasanna, Viktor K., Node Level Primitives for Parallel Exact Inference, 19th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD ’07), 2007
    263. Hong, Bo; Prasanna, Viktor K., Adaptive Allocation of Independent Tasks to Maximize Throughput, IEEE Transactions on Parallel and Distributed Systems, 2007
    264. Zhuo, Ling; Morris, Gerald R.; Prasanna, Viktor K., High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2007
    265. Mottola, Luca; Pathak, Animesh; Bakshi, Amol; Prasanna, Viktor K.; Picco, Gian Pietro, Enabling Scope-Based Interactions in Sensor Network Macroprogramming, Fourth IEEE International Conference on Mobile Ad-hoc and Sensor Systems (MASS ’07), 2007
    266. Xia, Yinglong; Prasanna, Viktor K., Parallel Exact Inference, 11th International Conference on Parallel Computing (ParCo ’07), 2007
    267. Zhuo, Ling; Prasanna, Viktor K., Optimizing Matrix Multiplication on Heterogeneous Reconfigurable Systems, 11th International Conference on Parallel Computing (ParCo ’07), 2007
    268. Jiang, Weirong; Prasanna, Viktor K., A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup, 15th IEEE Symposium on High Performance Interconnects (HotI ’07), 2007
    269. Pathak, Animesh; Zhou, Qunzhi; Mottola, Luca; Bakshi, Amol; Prasanna, Viktor K.; Picco, Gian Pietro, End-to-end Toolkit for Developing a Class of WSN Applications on Sun SPOT Nodes, 3rd International Conference on Distributed Computing in Sensor Systems (DCOSS ’07), 2007
    270. Li, Xiaorong; Veeravalli, B.; Prasanna, Viktor K., A Window-assisted Video Partitioning Strategy for Partitioning and Caching Video Streams in Distributed Multimedia Systems, Journal of Parallel and Distributed Computing (JPDC), 2007
    271. Pathak, Animesh; Mottola, Luca; Bakshi, Amol; Prasanna, Viktor K.; Picco, Gian Pietro, A Compilation Framework for Macroprogramming Networked Sensors, 3rd International Conference on Distributed Computing in Sensor Systems (DCOSS ’07), 2007
    272. Zhuo, Ling; Prasanna, Viktor K., Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2007
    273. Mohanty, Sumit; Prasanna, Viktor K., A Model-based Extensible Design Framework for Efficient Application Design using FPGA, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2007
    274. Morris, G. R.; Prasanna, Viktor K., Sparse matrix computations on reconfigurable hardware, Computer, 2007
    275. Pathak, Animesh; Mottola, Luca; Bakshi, Amol; Prasanna, Viktor K.; Picco, Gian Pietro, Expressing Sensor Network Interaction Patterns using Data-Driven Macroprogramming, 3rd IEEE International Workshop on Sensor Networks and Systems for Pervasive Computing (PerSeNS ’07), in conjunction with PERCOM, 2007
    276. Veeravalli, B.; Prasanna, Viktor K., Fault-Tolerant Analysis for Multiple Servers Movie Retrieval Strategy for Distributed Multimedia Applications, Multimedia Tools and Applications, 2007
    277. Soma, Ramakrishna; Bakshi, Amol; Sie, W. Da; Prasanna, Viktor K., Model-Based Framework for Developing and Deploying Data Aggregation Workflows, 4th International Conference on Service Oriented Computing (ICSOC ’06), 2006
    278. Scrofano, R.; Prasanna, Viktor K., Preliminary Investigation of Advanced Electrostatics in Molecular Dynamics on Reconfigurable Computers, SuperComputing, 2006
    279. Yu, Yang; Prasanna, Viktor K.; Krishnamachari, Bhaskar, Energy Minimization for Real-Time Data Gathering in Wireless Sensor Networks, IEEE Transactions on Wireless Communications, 2006
    280. Yu, Yang; Prasanna, Viktor K., Exploring Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks, IEEE Transactions on Wireless Communications, 2006
    281. Baker, Zachary K.; Prasanna, Viktor K., Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs, IEEE Transactions on Dependable and Secure Computing, 2006
    282. Namasivayam, Vasanth Krishna; Pathak, Animesh; Prasanna, Viktor K., Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference, 18th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD ’06), 2006
    283. Namasivayam, Vasanth Krishna; Prasanna, Viktor K., Scalable Parallel Implementation of Exact Inference in Bayesian Networks, 12th International Conference on Parallel and Distributed Systems (ICPADS ’06), 2006
    284. Morris, G. R.; Anderson, R. D.; Prasanna, Viktor K., An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP ’06), 2006
    285. Zhuo, Ling; Prasanna, Viktor K., High-Performance and Parameterized Matrix Factorization on FPGAs, 16th International Conferenceon Field Programmable Logic and Applications, 2006
    286. Singh, Mitali; Prasanna, Viktor K., Energy-efficient and Fault-tolerant Resolution of Topographic Queries in Networked Sensor Systems, International Conference on Parallel and Distributed Systems (ICPADS ’06), 2006
    287. Kim, J.-K.; Hensgen, D.; Kidd, T.; Siegel, H. J.; Prasanna, Viktor K., A Flexible Multi-Dimensional QoS performance Measure Framework for Distributed Heterogeneous Systems, Special Issue on Cluster Computing in Science andEngineering, 2006
    288. Ou, Jingzhao; Prasanna, Viktor K., Design Space Exploration Using Arithmetic Level Hardware-Software Co-Simulation for Configurable Multi-Processor Platforms, ACM Transactions on Embedded Computing Systems (TECS), 2006
    289. Pathak, Animesh; Prasanna, Viktor K., Issues in Designing a Compilation Framework for Macroprogrammed Networked Sensor Systems, International Conference on Integrated Internet Ad hoc and Sensor Networks (InterSense ’06)Nice, 2006
    290. Jung, H.-J.; Baker, Zachary K.; Prasanna, Viktor K., Performance of FPGA Implementation of Bit-split Architecture for Intrusion Detection Systems, Reconfigurable Architectures Workshop atIPDPS (RAW ’06), 2006
    291. Baker, Zachary K.; Prasanna, Viktor K., An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing System, Fourteenth Annual IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’06), 2006
    292. Kwatra, A.; Singh, M.; Prasanna, Viktor K., Accelerating DTI Tractography using FPGAs, the 13th ReconfigurableArchitecture Workshop at IPDPS (RAW ’06), 2006
    293. Hong, Bo; Prasanna, Viktor K., Maximum Lifetime Data Sensing and Extraction in Energy Constrained Networked Sensor, Journal of Parallel and Distributed Computing, 2006
    294. Scrofano, Ronald; Gokhale, Maya; Trouw, Frans; Prasanna, Viktor K., A Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers, 14th Annual IEEE Symposium on Field Programmable Custom Computing Machines (FCCM ’06), 2006
    295. Morris, Gerald R.; Anderson, Richard D.; Prasanna, Viktor K., A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’06), 2006
    296. Baker, Zachary K.; Jung, H.-J.; Prasanna, Viktor K., Regular Expression Software Deceleration for Intrusion Detection System, 16th Annual International Conference on Field-Programmable Logic and Applications (FPL ’06), 2006
    297. Morris, Gerald R.; Prasanna, Viktor K., An FPGA-Based Floating-Point Jacobi Iterative Solver, 8th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN ), 2005
    298. Zhuo, Ling; Prasanna, Viktor K., High Performance Linear Algebra Operations on Reconfigurable Systems, Proceedings of SuperComputing, 2005
    299. Jang, Ju-wook; Choi, Seonil; Prasanna, Viktor K., Energy-Efficient Matrix Multiplication on FPGAs, IEEE Transactions on VLSI (TVLSI), 2005
    300. Zhuo, Ling; Prasanna, Viktor K., High-Performance and Area-Efficient Reduction Circuits on FPGAs, 17th International Symposium on Computer Architecture and High Performance Computing, 2005
    301. Baker, Zachary K.; Prasanna, Viktor K., Computationally-efficient Engine for Flexible Intrusion Detection, IEEE Transactions on VLSI, 2005
    302. Morris, Gerald R.; Prasanna, Viktor K., Pipelined Datapath for an IEEE-754 64-Bit Floating-Point Jacobi Solver, 9th Annual Workshop on High Performance Embedded Computing (HPEC ), 2005
    303. Ou, Jingzhao; Prasanna, Viktor K., Arithmetic-Level Instruction Based Energy Estimation for FPGA based Soft Processors, Journal of Low Power Electronics (JOLPE), 2005
    304. Zhuo, Ling; Prasanna, Viktor K., Design Tradeoffs for BLAS Operations on Reconfigurable Hardware, International Conference on Parallel Processing, 2005
    305. Govindu, Gokul; Scrofano, Ronald; Prasanna, Viktor K., A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific Computing, International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005
    306. Ou, Jingzhao; Prasanna, Viktor K., Time And Energy Efficient Viterbi Decoding Using FPGAs, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2005
    307. Ou, Jingzhao; Prasanna, Viktor K., MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors, Reconfigurable Architecture Workshop (RAW), joint with IPDPS, 2005
    308. Zhuo, Ling; Morris, Gerlad R.; Prasanna, Viktor K., Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores, Reconfigurable Architecture Workshop (RAW), joint with IPDPS, 2005
    309. Morris, Gerald R.; Zhuo, Ling; Prasanna, Viktor K., High-Performance FPGA-Based General Reduction Methods, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM ), 2005
    310. Yu, Yang; Hong, Bo; Prasanna, Viktor K., Communication Models for Algorithm Design in Wireless Sensor Networks, 7th Workshop on Advances in Parallel and Distributed Computational Models held at 19th International Parallel and Distributed Processing Symposium (IPDPS ’05), 2005
    311. Singh, Mitali; Prasanna, Viktor K., Supporting Topographic Queries in a Class of Networked Sensor Systems, Workshop on Sensor Networks and Systems for Pervasive Computing (PerSeNS), 2005
    312. Yu, Yang; Hong, Bo; Prasanna, Viktor K., On Communication Models for Algorithm Design for Networked Sensor Systems: A Case Study, Elsevier Pervasive and Mobile Computing Journal, 2005
    313. Zhuo, Ling; Prasanna, Viktor K., Sparse Matrix-Vector Multiplication on FPGAs, 13th ACM International Symposium on Field-Programmable Gate Arrays, 2005
    314. Yu, Yang; Prasanna, Viktor K., Energy-Balanced Task Allocation for Collaborative Processing in Wireless Sensor Networks, ACM/Kluwer Journal of Mobile Networks and Applications (MONET) Special Issue on Algorithmic Solutions for Wireless, Mobile, Ad Hoc and Sensor Networks, 2005
    315. Ou, Jingzhao; Prasanna, Viktor K., COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors, IEEE International Symposium on Field-programmable Custom Computing Machines (FCCM), 2005
    316. Bakshi, Amol; Prasanna, Viktor K.; Reich, J.; Larner, D., The Abstract Task Graph: A Methodology for Architecture-Independent Programming of Networked Sensor Systems, Workshop on End-to-end Sense-and-respond Systems (EESR ), 2005
    317. Bakshi, Amol; Pathak, Animesh; Prasanna, Viktor K., System-level support for macroprogramming of networked sensing applications, International Conference on Pervasive Systems and Computing (PSC ), 2005
    318. Gertphol, Sethavidh; Prasanna, Viktor K., MIP Formulations for Robust Resource Allocation in Dynamic Real-Time Systems, Journal of Systems and Software, 2005
    319. Hong, Bo; Prasanna, Viktor K., Maximum Data Gathering in Networked Sensor Systems, International Journal of Distributed Sensor Networks, 2005
    320. Baker, Zachary K.; Prasanna, Viktor K., Hardware Accelerated Apriori Algorithm for Data Mining, The6th Los Alamos Computer Science Institute Symposium (LACSI ’05), 2005
    321. Bakshi, Amol; Larner, Daniel; Prasanna, Viktor K., Environment for Architecture-Independent Programming and Synthesis of Sensor Network Applications, International Conference on Information Processing in Sensor Networks (IPSN ), 2005
    322. Ou, Jingzhao; Choi, Seonil; Prasanna, Viktor K., Energy Efficient Hardware/Software Co-Synthesis of Reconfigurable SoCs for a Class of Applications on Reconfigurable SoCs, International Journal of Embedded Systems, 2005
    323. Baker, Zachary K.; Prasanna, Viktor K., Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs, Proceedings of the Thirteenth Annual IEEE Symposium on Field Programmable CustomComputing Machines (FCCM ’05), 2005
    324. Ou, Jingzhao; Prasanna, Viktor K., Rapid Energy Estimation for Hardware/Software Application Development Using FPGAs, International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2005
    325. Baker, Zachary K.; Prasanna, Viktor K., High-throughput Linked-Pattern Matching for Intrusion Detection Systems, First Annual ACM Symposium on Architectures for Networking and Communications Systems (ANCS ’05), 2005
    326. Hong, Bo; Prasanna, Viktor K., Optimizing a Class of In-network Processing Applications in Networked Sensor Systems, 1st IEEE International Conference on Mobile Ad-hoc and Sensor Systems (MASS ), 2004
    327. Mohanty, Sumit; Prasanna, Viktor K., Energy Efficient Application Design using FPGAs, FPGA and Programmable Logic Journal, 2004
    328. Scrofano, Ronald; Mohanty, Sumit; Prasanna, Viktor K.; Bogdanowicz, Julius F.; Wanek, Edward W., Memory Configuration based Design Space Exploration using MILAN, Annual High Performance Embedded Computing Workshop (HPEC), 2004
    329. Ou, Jingzhao; Prasanna, Viktor K., Rapid Energy Estimation of Computations on FPGA based Soft Processors, IEEE International SoC Conference (SOCC), 2004
    330. Park, Joon-Sang; Penner, Michael; Prasanna, Viktor K., Optimizing Graph Algorithms for Improved Cache Performance, IEEE Transactions on Parallel and Distributed Systems, 2004
    331. Baker, Zachary K.; Prasanna, Viktor K., Automated Incremental Design of Flexible Intrusion Detection Systems on FPGAs, Annual High Performance Embedded Computing Workshop (HPEC), 2004
    332. Mohanty, Sumit; Prasanna, Viktor K., A Framework for Energy Efficient Design of Multi-Rate Applications using Hybrid Reconfigurable Systems, International Conference on Field-Programmable Logic and its Applications (FPL), 2004
    333. Baker, Zachary K.; Prasanna, Viktor K., Efficient Architectures for Intrusion Detection, Twelfth Annual International Conference on Field-Programmable Logic and its Applications (FPL ’04), 2004
    334. Bakshi, Amol; Prasanna, Viktor K., Algorithm Design and Synthesis for Wireless Sensor Networks, 3rd International Conference on Parallel Processing (ICPP), 2004
    335. Singh, Mitali; Bakshi, Amol; Prasanna, Viktor K., Constructing Topographic Maps in Networked Sensor Systems, Workshop on AlgorithmS for Wireless and mobile Networks (ASWAN), 2004
    336. Ou, Jingzhao; Prasanna, Viktor K., A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms, International Conference on Field Programmable Logic and Applications (FPL), 2004
    337. Hong, Bo; Prasanna, Viktor K., Optimizing System Life time for Data Gathering in Networked Sensor Systems, Algorithm for Wireless and Ad-hoc Networks (A-SWAN) (Held in conjunction with MobiQuitous ), 2004
    338. Hong, Bo; Prasanna, Viktor K., Constrained Flow Optimization with Applications to Data Gathering in Sensor Networks, First International Workshop on Algorithmic Aspects of Wireless Sensor Networks (ALGOSENSORS ), 2004
    339. Dandalis, Andreas; Prasanna, Viktor K., An Adaptive Cryptographic Engine for Internet Protocol Security Architectures, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2004
    340. Bakshi, Amol; Prasanna, Viktor K., Energy-Efficient Communication in Multi-channel Single-hop Sensor Networks, 10th International Conference on Parallel and Distributed Systems (ICPADS), 2004
    341. Hong, Bo; Prasanna, Viktor K., Performance Optimization of a De-centralized Task Allocation Protocol via Bandwidth and Buffer Management, Challenges of Large Applications in Distributed Environments Workshop (CLADE ), 2004
    342. Govindu, Gokul; Daga, Vikash; Gangadharpalli, Sridhar; Sridhar, V.; Prasanna, Viktor K., Efficient Floating-point based Block LU Decomposition on FPGAs, Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004
    343. Ou, Jingzhao; Prasanna, Viktor K., A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs, International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004
    344. Singh, Mitali; Prasanna, Viktor K., A Hierarchical Model for Distributed Collaborative Computation in Wireless Sensor Networks, International Journal of Foundations of Computer Science (IJFCS), 2004
    345. Scrofano, Ronald; Prasanna, Viktor K., Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware, International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004
    346. Zhuo, Ling; Prasanna, Viktor K., Energy Performance of Floating-Point Matrix Multiplication on FPGAs, International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004
    347. Ou, Jingzhao; Prasanna, Viktor K., Parameterized and Energy Efficient Adaptive Beamforming Using MATLAB/Simulink on FPGAs, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2004
    348. Mohanty, Sumit; Prasanna, Viktor K., Design of High-Performance Embedded System using Model Integrated Computing, 2nd RTAS Workshop on Model-Driven Embedded Systems, 2004
    349. Ou, Jingzhao; Prasanna, Viktor K., PyGen: A MATLAB/Simulink based Tool for Synthesizing Parameterized and Energy Efficient Designs Using FPGAs, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2004
    350. Mohanty, Sumit; Prasanna, Viktor K., Duty Cycle Aware Application Design using FPGAs, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2004
    351. Govindu, Gokul; Zhuo, Ling; Choi, Seonil; Prasanna, Viktor K., Analysis of High-performance Floating-point Arithmetic on FPGAs, Reconfigurable Architectures Workshop (RAW) held at the International Parallel and Distributed Processing Symposium (IPDPS), 2004
    352. Baker, Zachary K.; Prasanna, Viktor K., A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2004
    353. Govindu, Gokul; Choi, Seonil; Prasanna, Viktor K.; Daga, Vikash; Gangadharpalli, Sridhar; Sridhar, V., A High-Performance and Energy-efficient Architecture for Floating-point based LU Decomposition on FPGAs, Reconfigurable Architectures Workshop (RAW) held at the International Parallel and Distributed Processing Symposium (IPDPS), 2004
    354. Hong, Bo; Prasanna, Viktor K., A Distributed Adaptive Task Allocation in Heterogeneous Computing Environments to Maximize Throughput, International Parallel and Distributed Processing Symposium (IPDPS), 2004
    355. Zhuo, Ling; Prasanna, Viktor K., Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs, International Parallel and Distributed Processing Symposium (IPDPS), 2004
    356. Yu, Yang; Krishnamachari, Bhaskar; Prasanna, Viktor K., Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks, IEEE InfoCom, 2004
    357. Baker, Zachary K.; Prasanna, Viktor K., Time and Area Efficient Pattern Matching on FPGAs, Twelfth ACM International Symposium on Field-Programmable Gate Arrays (FPGA ), 2004
    358. Yu, Yang; Krishnamachari, Bhaskar; Prasanna, Viktor K., Issues in Designing Middleware for Wireless Sensor Networks, IEEE Network Magazine, Special issue on Middleware Technologies for Future Communication Networks, 2004
    359. Bakshi, Amol; Prasanna, Viktor K., Structured Communication in Single-hop Sensor Networks, 1st European Workshop on Wireless Sensor Networks (EWSN), 2004
    360. Hong, Bo; Prasanna, Viktor K., Simulation of Adaptive Applications in Heterogeneous Computing Environments, Special Issue on Cluster/Grid Computing, International Journal of Computers and Applications, 2004
    361. Park, Neungsoo; Prasanna, Viktor K., Dynamic Data Layouts for Cache-conscious Implementation of Signal Transforms, IEEE Transactions on Signal Processing, 2004
    362. Yu, Yang; Prasanna, Viktor K., Energy-Efficient Multi-Hop Packet Transmission using Modulation Scaling in Wireless Sensor Networks, IEEE Global Communications Conference (GlobeCom), 2003
    363. Choi, Seonil; Jang, Ju-wook; Mohanty, Sumit; Prasanna, Viktor K., Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures, Special Issue on Configurable Computing of the Journal of Supercomputing, Kluwer, 2003
    364. Hong, Bo; Prasanna, Viktor K., Bandwidth-Aware Resource Allocation for Computing Independent Tasks in Heterogeneous Computing Systems, 15th Annual International Conference on Parallel and Distributed Computing and Systems (PDCS ), 2003
    365. Hong, Bo; Prasanna, Viktor K., Bandwidth-Aware Resource Allocation for Heterogeneous Computing Systems to Maximize Throughput, International Conference on Parallel Processing (ICPP), 2003
    366. Mohanty, Sumit; Prasanna, Viktor K., A Hierarchical Approach for Energy Efficient Application Design Using Heterogeneous Embedded Systems, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES ), 2003
    367. Choi, Seonil; Prasanna, Viktor K., Time and Energy Efficient Matrix Factorization, 13th International Conference on Field Programmable Logic and Applications (FPL ), 2003
    368. Singh, Mitali; Prasanna, Viktor K.; Rolim, Jose; Raghavendra, Cauligi S., Collaborative and Distributive Computation in Mesh-like Wireless Sensor Arrays, Personal Wireless Communications (PWC), 2003
    369. Govindu, Gokul; Zhuo, Ling; Choi, Seonil; Gundala, Padma; Prasanna, Viktor K., Area and Power Performance Analysis of a Floating-point based Application on FPGAs, Seventh Annual Workshop on High Performance Embedded Computing (HPEC ), 2003
    370. Ou, Jingzhao; Choi, Seonil; Govindu, Gokul; Prasanna, Viktor K., Creating Parameterized and Energy-Efficient System Generator Designs, 6th Annual Military and Aerospace Programmable Logic Devices (MAPLD) International Conference, 2003
    371. Mohanty, Sumit; Prasanna, Viktor K., An Algorithm Designer’s Workbench for Platform FPGAs, 13th International Conference on Field Programmable Logic and Applications (FPL ), 2003
    372. Baker, Zachary K.; Prasanna, Viktor K., A Methodology for Optimized FPGA Design of Signal Processing Kernels, 6th Annual Military and Aerospace Programmable Logic Devices (MAPLD) International Conference, 2003
    373. Andreev, Egor; Mohanty, Sumit; Prasanna, Viktor K., A Modeling and Exploration Framework for Mapping of Linear Array of Tasks onto Adaptive Computing Systems, 6th Annual Military and Aerospace Programmable Logic Devices (MAPLD) International Conference, 2003
    374. Park, Neungsoo; Hong, Bo; Prasanna, Viktor K., Tiling, Block Data Layout, and Memory Hierarchy Performance, IEEE Transactions on Parallel and Distributed Systems, 2003
    375. Scrofano, Ronald; Jang, Ju-Wook; Prasanna, Viktor K., Energy-Efficient Discrete Cosine Transform on FPGAs, International Conference on Engineering of Reconfigurable Systems and Algorithms, 2003
    376. Yu, Yang; Prasanna, Viktor K., Energy-Balanced Task Allocation for Collaborative Processing in Networked Embedded System, ACM Conference on Language, Compilers, and Tools for Embedded Systems (LCTES), 2003
    377. Yu, Yang; Prasanna, Viktor K., Resource Allocation for Independent Real-Time Tasks in Heterogeneous Systems for Energy Minimization, Journal of Information Science and Engineering, 2003
    378. Singh, Mitali; Prasanna, Viktor K., Optimal Energy Balanced Algorithm for Selection in Single Hop Sensor Network, IEEE International Workshop on Sensor Network Protocols and Applications (SNPA) ICC, 2003
    379. Singh, Mitali; Prasanna, Viktor K., Algorithmic Techniques for Memory Energy Reduction, Workshop for Experimental Algorithms (WEA), 2003
    380. Ou, Jingzhao; Choi, Seonil; Prasanna, Viktor K., Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2003
    381. Choi, Seonil; Govindu, Gokul; Jang, Ju-Wook; Prasanna, Viktor K., Energy-Efficient and Parameterized Designs of Fast Fourier Transforms on FPGAs, 28th International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2003
    382. Mohanty, Sumit; Ou, Jingzhao; Prasanna, Viktor K., A Simulation and Estimation Framework for Energy Efficient Design using Platform FPGAs, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2003
    383. Singh, Mitali; Prasanna, Viktor K., Energy-Optimal and Energy-Balanced Sorting in a Single-Hop Sensor Network, IEEE Conference on Pervasive Computing and Communications (PERCOM), 2003
    384. Choi, Seonil; Scrofano, Ronald; Prasanna, Viktor K.; Jang, Ju-Wook, Energy-Efficient Signal Processing Using FPGAs, Eleventh ACM International Symposium on Field-Programmable Gate Arrays (FPGA ), 2003
    385. Bhat, Prashanth; Raghavendra, Cauligi S.; Prasanna, Viktor K., Efficient Collective Communication in Distributed Heterogeneous Systems, Journal of Parallel and Distributed Computing, 2003
    386. Yu, Yang; Prasanna, Viktor K., Power-Aware Resource Allocation for Independent Tasks in Heterogeneous Real-Time Systems, 28th IEEE International Conference on Parallel and Distributed Systems (ICPADS), 2002
    387. Scrofano, Ronald; Choi, Seonil; Prasanna, Viktor K., Energy Efficiency of FPGAs and Programmable Processors for Matrix Multiplication, First IEEE International Conference on Field Programmable Technology (FPT), 2002
    388. Hong, Bo; Prasanna, Viktor K., Adaptive Matrix Multiplication in Heterogeneous Environments, International Conference on Parallel and Distributed Systems, 2002
    389. Jang, Ju-Wook; Choi, Seonil; Prasanna, Viktor K., Area and Time Efficient Implementation of Matrix Multiplication on FPGAs, 1st IEEE International Conference on Field Programmable Technology (FPT), 2002
    390. Bakshi, Amol; Ou, Jingzhao; Prasanna, Viktor K., Towards Automatic Synthesis of a Class of Application-Specific Sensor Networks, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), 2002
    391. Ou, Jingzhao; Choi, Seonil; Prasanna, Viktor K., Modeling and Energy-Efficient Application Mapping of Configurable SoC Architectures, Technical Report, Department of Electrical Engineering, University of Southern California, 2002
    392. Wang, Xi; Prasanna, Viktor K., Application Directed Explicit Management for Advanced Cache Architectures, Technical Report, Department of Electrical Engineering, University of Southern California, 2002
    393. Hong, Bo; Prasanna, Viktor K., A Modular and Extensible Simulator for Performance Evaluation of Adaptive Applications in Heterogeneous Computing Environments, International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP ), 2002
    394. Gertphol, S.; Prasanna, Viktor K., MIP Formulations for Robust Resource Allocation in Dynamic Real-time Systems, Technical Report, Department of Electrical Engineering, University of Southern California, 2002
    395. Mohanty, Sumit; Prasanna, Viktor K., Rapid System-Level Performance Evaluation and Optimization for Application Mapping onto SOC Architectures, 15th IEEE International ASIC/SOC Conference, 2002
    396. Choi, S.; Scrofano, R.; Prasanna, Viktor K., Energy-Efficient Design of Kernel Applications for FPGAs Through Domain-Specific Modeling, 5th annual Military and Aerospace Programmable Logic Devices (MAPLD) International Conference, 2002
    397. Sidhu, Reetinder; Prasanna, Viktor K., Efficient Metacomputation using Self-Reconfiguration, 12th International Conference on Field Programmable Logic and Applications (FPL), 2002
    398. Baker, Zachary K.; Prasanna, Viktor K., Performance Modeling and Interpretive Simulation of PIM Architectures and Applications, Euro-Par, 2002
    399. Park, Neungsoo; Hong, Bo; Prasanna, Viktor K., Analysis of Memory Hierarchy Performance of Block Data Layout, International Conference on Parallel Processing (ICPP ), 2002
    400. Bondalapati, Kiran; Prasanna, Viktor K., Reconfigurable Computing Systems, Proceedings of the IEEE, 2002
    401. Mohanty, Sumit; Choi, Seonil; Jang, Ju-wook; Prasanna, Viktor K., A Model-based Methodology for Application Specific Energy Efficient Data Path Design using FPGAs, IEEE 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2002
    402. Mohanty, Sumit; Prasanna, Viktor K.; Neema, Sandeep; Davis, James, Rapid Design Space Exploration of Heterogeneous Embedded Systems using Symbolic Search and Multi-Granular Simulation, Language Compilers and Tools for Embedded Systems, 2002
    403. Ali, Shoukat; Kim, Jong-Kook; Siegel, Howard Jay; Maciejewski, Anthony A.; Yu, Yang; Gundala, Shriram B.; Gertphol, Sethavidh; Prasanna, Viktor K., Greedy Heuristics for Resource Allocation in Dynamic Distributed Real-Time Heterogeneous Computing Systems, International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’02), 2002
    404. Choi, Seonil; Jang, Ju-Wook; Mohanty, Sumit; Prasanna, Viktor K., Domain-Specific Modeling for Rapid System-Wide Energy Estimation of Reconfigurable Architectures, Engineering of Reconfigurable Systems and Algorithms (ERSA’02), 2002
    405. Park, Neungsoo; Hong, Bo; Prasanna, Viktor K., Cache Performance Analysis for Block Size Selection in the ATLAS Library, HPCMO User Group Conference, 2002
    406. Bakshi, Amol; Ou, Jingzhao; Prasanna, Viktor K., Power-Aware Embedded System Design Using the MILAN Framework, IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking (IMPACCT), 2002
    407. Singh, Mitali; Prasanna, Viktor K., System Level Energy Trade-offs for Collaborative Computation in Wireless Networks, IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking (IMPACCT), 2002
    408. Tang, Caimu; Raghavendra, Cauligi S.; Prasanna, Viktor K., Energy Efficient Adaptation of Multicast Protocols in Power Controlled Wireless Ad Hoc Networks, International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN), 2002
    409. Ali, Shoukat; Kim, Jong-Kook; Yu, Yang; Gundala, Shriram; Gertphol, Sethavidh; Siegel, Howard Jay; Maciejewski, Anthony A.; Prasanna, Viktor K., Utilization-Based Techniques for Statistically Mapping Heterogeneous Applications onto the Hiper-D Heterogeneous Computing System, Journal of Parallel and Distributed Computing Practices, special issue on Algorithms, Systems, and Tools for High Performance Computing Networks, 2002
    410. Ali, Shoukat; Kim, Jong-Kook; Yu, Yang; Gundala, Shriram B.; Gertphol, Sethavidh; Maciejewski, Anthony A.; Siegel, Howard Jay; Prasanna, Viktor K., Utilization-based Heuristics for Statically Mapping Real-Time Applications onto the HiPer-D Distributed Heterogeneous Computing System, Heterogeneous Computing Workshop, HCW, 2002
    411. Gertphol, Sethavidh; Yu, Yang; Gundala, Shriram B.; Prasanna, Viktor K.; Ali, Shoukat; Kim, Jong-Kook; Maciejewski, Anthony A.; Siegel, Howard Jay, A Metric and Mixed-Integer-Programming-Based Approach for Resource Allocation in Dynamic Real-Time Systems, Proceedings of International the International Parallel and Distributed Processing Symposium, 2002
    412. Suh, Jinwoo; Prasanna, Viktor K., An Efficient Algorithm for Out-of-Core Matrix Transposition, IEEE Transactions on Computers, 2002
    413. Penner, Michael; Prasanna, Viktor K., Cache Friendly Implementations of Transitive Closure, Proceedings of International Conference on Parallel Architectures and Compilation Techniques, 2001
    414. Mathur, Vaibhav; Prasanna, Viktor K., Hierarchical Simulation Framework for Application Development on System-on-Chip Architectures, IEEE International ASIC-SOC Conference, 2001
    415. Dandalis, Andreas; Prasanna, Viktor K.; Thiruvengadam, Bharani, Run-time Performance Optimization of an FPGA-based Deduction Engine for SAT Solvers, International Conference on Field Programable Logic and Applications, 2001
    416. Dandalis, Andreas; Prasanna, Viktor K., Signal Processing using Reconfigurable System-on-Chip Platforms, International Conference on Engineering of Reconfigurable Systems and Algorithms, 2001
    417. Bakshi, Amol; Prasanna, Viktor K.; Ledeczi, Akos, MILAN: A Model Based Integrated Simulation Framework for Design of Embedded Systems, Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2001
    418. Park, Neungsoo; Prasanna, Viktor K., Cache Conscious Walsh-Hadamard Transform, 26th International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2001
    419. Alhusaini, Ammar; Raghavendra, Cauligi S.; Prasanna, Viktor K., Run-Time Adaptation for Grid Environments, Heterogenous Computing Workshop, 15th International Parallel and Distributed Processing Symposium (IPDPS), 2001
    420. Sidhu, Reetinder; Prasanna, Viktor K., Fast Regular Expression Matching using FPGAs, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM ), 2001
    421. Gertphol, Sethavidh; Yu, Yang; Alhusaini, Ammar; Prasanna, Viktor K., An Integer Programming Approach for Static Mapping of Paths onto Heterogeneous Real-Time Systems, Ninth Workshop on Parallel and Distributed Real-Time Systems (WPDRTS), 15th International Parallel and Distributed Processing Symposium (IPDPS), 2001
    422. Dandalis, Andreas; Prasanna, Viktor K., Configuration Compression for FPGA-based Embedded Systems, ACM International Symposium on Field-Programmable Gate Arrays, 2001
    423. Lee, Myungho; Liu, Wenheng; Prasanna, Viktor K., Parallel Implementation of a Class of Adaptive Signal Processing Applications, Algorithmica, 2001
    424. Bhat, Prashanth; Raghavendra, Cauligi S.; Prasanna, Viktor K., Block-Cyclic Redistribution over Heterogeneous Networks, Cluster Computing, 2000
    425. Dandalis, Andreas; Prasanna, Viktor K., FPGA-based Cryptography for Internet Security, Online Symposium for Electronic Engineers, 2000
    426. Sidhu, Reetinder; Wadhwa, Sameer; Mei, Alessandro; Prasanna, Viktor K., A Self-Reconfigurable Gate Array Architecture, International Conference on Field Programmable Logic and Applications, 2000
    427. Dandalis, Andreas; Prasanna, Viktor K.; Rolim, Jose D. P., A Comparative Study of Performance of AES Final Candidates Using FPGAs, Workshop on Cryptographic Hardware and Embedded Systems, 2000
    428. Chung, Y.; Park, K.; Hahn, W.; Park, N.; Prasanna, Viktor K., Performance of On-Chip Multiprocessors for Vision Tasks, Workshop on Parallel and Distributed Computing in Image Processing, Video Processing, and Multimedia, 2000
    429. Bondalapati, Kiran; Prasanna, Viktor K., Loop Pipelining and Optimization for Run Time Reconfiguration, Reconfigurable Architectures Workshop, 2000
    430. Park, Neungsoo; Kang, Dongsoo; Bondalapati, Kiran; Prasanna, Viktor K., Dynamic Data Layouts for Cache-conscious Factorization of DFT, International Parallel and Distribute Processing Symposium, 2000
    431. Dandalis, Andreas; Prasanna, Viktor K.; Rolim, Jose D. P., An Adaptive Cryptographic Engine for IPSec Architectures, IEEE Symposium on Field-Programming Custom Computing Machines, 2000
    432. Park, Neungsoo; Liu, Wenheng; Prasanna, Viktor K.; Raghavendra, Cauligi S., Efficient Matrix Multiplication Using Cache Conscious Data Layouts, HPCMO User Group Conference, 2000
    433. Park, Neungsoo; Prasanna, Viktor K.; Raghavendra, Cauligi S., Efficient Communication Schedule for Block-Cyclic Array Redistribution between Processor Sets, IEEE Transactions on Parallel and Distributed Systems, 1999
    434. Sidhu, Reetinder P.; Mei, Alessandro; Prasanna, Viktor K., Genetic Programming using Self-Reconfigurable FPGAs, International Workshop on Field Programmable Logic and Applications, 1999
    435. Bondalapati, Kiran; Prasanna, Viktor K., DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Architectures, International Workshop on Field Programmable Logic and Applications, 1999
    436. Bondalapati, Kiran; Prasanna, Viktor K., Dynamic Precision Management for Loop Computations on Reconfigurable Architectures, IEEE Symposium on Field-Programming Custom Computing Machines (FCCM), 1999
    437. Dandalis, Andreas; Mei, Alessandro; Prasanna, Viktor K., Domain Specific Mapping for Solving Graph Problems on Reconfigurable Devices, Reconfigurable Architectures Workshop (RAW ’99), 1999
    438. Alhusaini, Ammar; Prasanna, Viktor K.; Raghavendra, Cauligi S., A Unified Resource Scheduling Framework for Heterogeneous Computing Environments, 8th Heterogeneous Computing Workshop (HCW ’99), 1999
    439. Sidhu, Reetinder P.; Mei, Alessandro; Prasanna, Viktor K., String Matching on Multicontext FPGAs using Self-Reconfiguration, International Symposium on Field-Programmable Gate Arrays, 1999
    440. Lim, Young Won; Bhat, Prashanth B.; Prasanna, Viktor K., Efficient Algorithms for Block Cyclic Redistribution of Arrays, Algorithmica, 1999
    441. Bae, Jongwoo; Prasanna, Viktor K., Synthesis of Area-Efficient and High-Throughput Rate Data Format Converters, IEEE Transactions on VLSI Systems, 1998
    442. Park, Neungsoo; Prasanna, Viktor K.; Raghavendra, Cauligi S., Efficient Algorithms for Block-Cyclic Array Redistribution between Processor Sets, SC98 High Performance Networking and Computing Conference, 1998
    443. Bondalapati, Kiran; Prasanna, Viktor K., Mapping Loops onto Reconfigurable Architectures, 8th International Workshop on Field Programmable Logic and Applications, 1998
    444. Liu, Wenheng; Prasanna, Viktor K., Designing Application Software for Embedded Signal Processing, IEEE Signal Processing, 1998
    445. Lim, Yong Won; Park, Neungsoo; Prasanna, Viktor K., Efficient Algorithms for Multi-dimensional Block-Cyclic Redistribution of Arrays, ICPP `98, 1998
    446. Bhat, Prashanth B.; Prasanna, Viktor K.; Raghavendra, Cauligi S., Adaptive Communication Algorithms for Distributed Heterogeneous Systems, International Symposium on High Performance Distributed Computing, 1998
    447. Suh, Jinwoo; Prasanna, Viktor K., Portable Implementation of Real Time Signal Processing Benchmarks on HPC Platforms, International Workshop on Applied Parallel Computing in Large Scale Scientific and Industrial Problems, 1998
    448. Chung, Yongwha; Prasanna, Viktor K., Parallelizing Image Feature Extraction on Coarse-Grain Machines, IEEE Transactions on PAMI, 1998
    449. Suh, Jinwoo; Ung, Monte; Prasanna, Viktor K., Parallel Implementations of Synthetic Aperture Radar on High Performance Computing Platforms, IEEE International Conference on Algorithms and Architectures for Parallel Processing, 1997
    450. Chung, Yongwha; Choi, Seonil; Prasanna, Viktor K., Parallel Object Recognition on an FPGA-based Configurable Computing Platform, International Workshop on Computer Architectures for Machine Perception, 1997
    451. Dandalis, Andreas; Prasanna, Viktor K., Fast Parallel Implementation of DFT using Configurable Devices, International Workshop on Field Programming Logic and Applications, 1997
    452. Jang, Ju-wook; Park, Heonchul; Prasanna, Viktor K., An optimal Multiplication Algorithm on Reconfigurable Mesh, IEEE Transactions on Parallel and Distributed Systems (TPDS), 1997
    453. Bondalapati, Kiran; Prasanna, Viktor K., Reconfigurable Meshes: Theory and Practice, Reconfigurable Architectures Workshop, International Parallel Processing Symposium, 1997
    454. Lee, Myungho; Prasanna, Viktor K., High Throughput-Rate Parallel Algorithms for Space Time Adaptive Processing, 2nd International Workshop on Embedded Systems and Applications, 1997
    455. Jang, Ju-wook; Nigam, Madhusudan; Prasanna, Viktor K.; Sahni, Sartaj, Constant Time Algorithms for Computational Geometry on the Reconfigurable Mesh, IEEE Transactions on Parallel and Distributed Systems, 1997
    456. Liu, Wenheng; Wang, Cho-Li; Prasanna, Viktor K., Portable and Scalable Algorithms for Irregular All-to-all Communication, Proc. 16th International Conference on Distributed Computing Systems (ICDCS ’96), 1996
    457. Chung, Yongwha; Prasanna, Viktor K.; Wang, Cho-Li, Parallel Algorithms for Linear Approximation on Distributed Memory Machines, DARPA Image Understanding Workshop, 1996
University of Southern California