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Asynchronous VLSI

Asynchronous VLSI Area

The E2S2C group has a long history in asynchronous VLSI design, including two startups, Timeless Design Automation and Reduced Energy Microsystems. Former PhD student Georgios Dimou was involved with both start-ups and is now the Co-Founder and CTO of Niobium Microsystems, a third start-up using asynchronous design to solve real-world problems. We are currently sub-contracting to Niobium and will support their efforts designing asynchronous network-on-chips for an accelerator for fully homomorphic encryption and radiation-hardened applications.

Currently involved students: Moises Herrera

List of publications:

  1. [IEEE GLSVLSI 2022] M. Herrera and P. A. Beerel. “Radiation Hardening by Design Techniques for the Mutual Exclusion Element”.
  2. [IEEE ASYNC 2020] J. Paykin, B. Huffman, D. M. Zimmerman, P. A. Beerel. “Formal Verification of Flow Equivalence in Desynchronized Designs.” ASYNC 2020: 54-62 (Best Paper Award Winner).
  3. [IEEE ASYNC 2020] Felipe Kruentzer, Moises Herrera, Oliver Schrape, P.A. Beerel, Milos Kristic, “Radiation Hardened Click Controllers for Soft Error Resilient Asynchronous Architectures”.
  4. [IEEE PATMOS 2018] Moises Herrera, T. Wang, P.A. Beerel, “Blade-OC Asynchronous Resilient Template”, Platja d’Aro, Spain, 2018, pp. 147-154.
University of Southern California