Skip to content


Principal Investigator

Professor Peter A. Beerel

Peter received his B.S.E. degree in Electrical Engineering from Princeton University, Princeton, NJ, in 1989 and his M.S. and Ph.D. degrees in Electrical Engineering from Stanford University, Stanford, CA, in 1991 and 1994, respectively. Professor Beerel is currently a Full Professor and Associate Chair of the Computer Engineering Division of the Ming Hsieh Electrical and Computer Engineering Department at the University of Southern California. He is also a Research Director at USC’s Information Sciences Institute. He co-founded TimeLess Design Automation to commercialize an asynchronous ASIC flow in 2008 and sold the company in 2010 to Fulcrum Microsystems which was bought by Intel in 2011. His interests include a variety of topics in CAD, VLSI, and Machine Learning. He and his students have won several best paper awards and he is a Senior Member of the IEEE.




Current PhD Students

Yuke Zhang


Sreetama Sarkar


Robert Aviles

Yue Hu

Xuan Zhou

Zeyu Liu

Yuou (Dorothy) Qiu

Alumni PhD Students

Xi Li

Thesis Title: “Multi-Phase Clocking and Hold Time Fixing for Single Flux Quantum Circuits.” Grad 12/2022 (Apple)


Gourav Datta

Thesis Title: “Towards Efficient Edge Intelligence with In-Sensor and Neuromorphic Computing: Algorithm-Hardware Co-Design” Grad 3/2023.

Dake Chen

Thesis title: “Attacks and Defense on Privacy of Hardware Intellectual Property and Machine Learning.” Grad 5/2023 (Univ. of California, San Francisco)

Moisés Herrera

Thesis title: “Radiation Hardened by Design Asynchronous Framework.” Grad. 6/2022. (Niobium Systems)


Souvik Kundu

Thesis title: “Algorithms and Frameworks for Generating Neural Network Models Addressing Energy-Efficiency, Robustness, and Privacy.” Grad. 4/2022. (Intel AI Labs, USA)

Huimei Cheng

Thesis title: “Automatic Conversion from Flip-Flop to 3-Phase Latch-Based Designs.”  Grad. 6/2020. (Apple)

Sourya Dey

Thesis title: “Exploring Complexity Reduction in Deep Learning.” Grad. 6/2020. (Galois)

Ramy N. Tadros

Thesis title: “Clocking Solutions for SFQ Circuits.” Grad. 6/2019. (Qualcomm)

Yang Zhang

Thesis title: “Production-level Test Issues in Delay-Line Based Asynchronous Designs.” Grad. 12/2018 (Huawei)

Dylan Hand

Thesis title: “Asynchronous Design for Timing Resiliency.” Grad. 1/2019. (Apple)

Hsin-Ho (Fei) Huang

Thesis title: “Formal Equivalence Checking and Logic Re-Synthesis for Asynchronous VLSI Designs.” Grad. 10/2016. (Google)

Matheus Moreira Trevisan

 (co-advised with Prof. Ney Calazans, PUCRS). Thesis title: “Asynchronous Circuits: Innovations in Components, Cell Libraries and Design Templates.” Grad. 1/2016 (Apple)

Mehrdad Najibi

Thesis title: “Average-Case Performance Analysis and Optimization of Conditional Asynchronous Circuits.” Grad. 11/2013. (Synopsys)

Arash Saifhashemi

Thesis title: “Power Optimization of Asynchronous Pipelines using Conditioning and Reconditioning based on a Three-Valued Logic Model.” Grad. 11/2012. (Google)

Pankaj Golani

Thesis title: “Theory, Implementation and Applications of Single-Track Designs.” Grad. 12/2009. (Apple)

Georgios Dimou

Thesis title: “Clustering and Fanout-Optimization of Asynchronous Circuits.” Grad. 12/2009. (Niobium Microsystems)

Sunan Tugsinavisut

Thesis title: “High-Level Synthesis of Asynchronous Circuits.” Grad 11/2005.

Marcos Ferretti

Thesis title: “Single-track Asynchronous Pipeline Template.” Grad. 8/2004. (PST Electronics)

Recep Ozdag

Thesis title: “Template-Based Asynchronous Circuit Design.” Grad. 11/2003. (Keysight Technologies)

Jay Moon

Thesis title: “Low-power Circuits for Battery Powered DSP Applications.” Grad. 6/2003 (Apple)

Sangyun Kim

Thesis title: “Pipeline Optimization for Asynchronous Circuits: Complexity Analysis and an Efficient Optimal Algorithms.” Grad. 5/2003. (Samsung)

Sangyun Kim 2023

Vida Vakilotojar

Thesis title: “Induced Hierarchical Verification of Asynchronous Circuits Using a Partial Order Technique.” Grad. 7/00. (PMC Sierra)

Wei-chun Chou

Thesis title: “Optimizing Average-Case Performance in the Technology Mapping of Asynchronous Circuits.” Grad. 8/99. (Synopsys)

Aiguo Xie

Thesis title: “Performance Analysis of Asynchronous Circuits and Systems.” Grad. 8/99. (Wayzar)

Youpyo Hong

Thesis title: “BDD Minimization and its Application to Synthesis and Verification.” Grad. 6/98. (Dungguk University)

Skip to toolbar